In electronic circuits that have multiple power supplies, power sequencing is the process of turning power supplies on or off in a particular order and in accordance with specific timing constraints, for the purpose of preventing conditions that could damage circuitry or cause improper operation.^[1][2]

In practice, a variety of methods are commonly used to control power sequencing. Such methods may incorporate fixed time delays, or use feedback from power supplies, or both to control power sequencing. Some power sequence controllers have fixed functionality, and others are programmable.^[2]

Many integrated circuits (ICs) and electronic systems have multiple power rails, meaning that they are powered by multiple voltage sources. For example, mixed signal ICs usually require separate power supplies for analog and digital circuitry, and may also have a separate power rail for digital I/O pins.^[3] Complex devices such as SOC and FPGA ICs usually require power from several voltage sources, with the latter sometimes having as many as ten or more rails.^[4] Electronic systems such as servers and industrial equipment also typically have multiple power rails.^[2]

In multi-rail circuits, the rail voltages often must be applied or removed, or both, in a particular order to avoid circuit damage and abnormal operation.^[2][1][3] For example, incorrect power sequencing can trigger latch-ups that disrupt normal circuit operation and allow potentially destructive, high currents to flow.^[3] Improper sequencing can also cause ESD and input protection diodes to become forward-biased, resulting in abnormal current flows and interference with the startup operation of one or more power rails.^[5][1] Without power-up sequencing, multiple rails may simultaneously ramp up their voltages and, in the process, draw high inrush current from their common power source, causing it to limit its output current. This in turn can cause the rail voltages to fluctuate and plateau or become non-monotonic as they start up, resulting in unpredictable power sequencing and possibly preventing the rails from reaching their required voltages.^[1][5] In addition to circuit damage and reduced lifespan, incorrect power sequencing can cause initialization errors, invalid logic states and unstable operation.^[2][5]

Various methods are used to implement power sequencing, but in general, the rails are energized or de-energized by enabling or disabling their associated voltage regulators, or by passing or blocking the regulator outputs with switching devices, in a predetermined order with controlled delays between the rail activations and deactivations.^[1][2]

A control mechanism for power sequencing may employ feedback or it may run open loop. Some controllers monitor the rail voltages and enable or disable dependent rails when specific voltage thresholds have been reached. In contrast, some other controllers impose fixed time delays between successive rail activations and deactivations, turning dependent rails on or off without monitoring or considering the states of other rails.^[2] More complex controllers, which are often programmable, monitor the rail voltages and switch dependent rails on or off based on the states of other rails as well as time delays.^[2]

Power sequencing must account for differences between the voltage ramp rates (slew rates) of the rails while they are powering up or down, because such differences can effectively alter the power sequence.^[1] For example, consider a system with two power rails, V_CC1 and V_CC2, in which the V_CC1 voltage is required to always be higher than V_CC2. If V_CC2 has a faster ramp rate than V_CC1, a sequence timing violation can occur even if V_CC1 is turned on before V_CC2, as shown below. A commonly used method for avoiding this is to monitor V_CC1 and, upon V_CC1 reaching a level that exceeds the V_CC2 target voltage, turn on V_CC2.^[1]

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  Power sequence timing violation due to different ramp rates. V_CC2 is turned on after V_CC1, but its faster ramp rate causes it to briefly exceed V_CC1.
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  Correct sequencing for supplies with different ramp rates

Many voltage regulators provide an enable (EN) input signal and a power good (PG) output signal that can be used to facilitate power-up sequencing. Such regulators are commonly connected in a daisy-chain so that the PG output of each regulator drives the EN input of the next regulator in the chain, as shown below.

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  Simplified schematic diagram of three daisy-chained voltage regulators. Each regulator, upon reaching its target output voltage, asserts its PG output, thus enabling the next regulator in the chain.
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  Timing diagram showing power-up sequencing of three daisy-chained regulators

• PMIC, power management integrated circuit