ICL Distributed Array Processor

The Distributed Array Processor (DAP) produced by International Computers Limited (ICL) was the world's first commercial massively parallel computer. The original paper study was complete in 1972 and building of the prototype began in 1974. The first machine was delivered to Queen Mary College in 1979.[1]

Development

The initial Pilot DAP was designed and implemented by Dr Stewart F Reddaway with the aid of David J Hunt and Peter M Flanders at the ICL Stevenage Labs.[citation needed] Their manager and a major contributor was John K Iliffe, designer of the Basic Language Machine and known for Iliffe vectors.[2] The pilot implementation had a 32×32 processing element arrangement.[3]

The ICL DAP had 64×64 single bit processing elements (PEs) with 4096 bits of storage per PE. It was attached to an ICL mainframe and its memory was mapped into the mainframe's memory. Programs for the DAP were written in DAP FORTRAN which was FORTRAN extended with 64×64 matrix and 64 element vector primitives. DAP Fortran compiled to an assembly language called APAL (Array Processor Assembly Language). The DAP had a single instruction, multiple data (SIMD) architecture. Each operation could be performed under the control of a mask which controlled which elements were affected. Array programs were executed as subroutines of normal mainframe FORTRAN programs and IO was handled by the mainframe.

Operationally, there was an overhead to transfer computational data into and out of the array, and problems which did not fit the 64×64 matrix imposed additional complexity to handle the boundaries, but for problems which suited the architecture, it could outperform the current Cray pipeline architectures by two orders of magnitude. The ICL 2980 was not a popular machine and this held back the use of the DAP as an attached processor was restricted initially to this one range.

The design as described in Reddaway's 1973 paper is pretty much that which was implemented in the first commercial version except the facility to supply address bits from the processing elements was removed. This change greatly simplified hardware error detection. A notable extra facility was carry propagation to simplify vector mode addition.[4]

After ICL

The DAP [IP] was sold off to a venture capital-funded start-up company Active Memory Technology (AMT) which was then taken over by Cambridge Parallel Processors (CPP). It was enhanced and made smaller and faster as the Gamma series.[5] An 8-bit processor with some local 8-bit wide memory was added to the processor and fast IO capabilities were implemented. It could be programmed in either C++ or Fortran-Plus. These were more flexible than DAP FORTRAN, in particular they automatically took care of choosing a mapping from user specified matrix and vector bounds to the underlying hardware.

Sample DAPs are in storage at the Computer History Museum.

CPP ceased trading in 2004.

Mini-DAP and Mil-DAP

An initiative to develop a smaller 32x32 version of the DAP for the PERQ workstation was initiated at the end of 1981, provisionally named PERQ-DAP and later known as Mini-DAP. Refinement of this concept identified applications such as computer-aided design and signal processing for defence applications. PERQ's broader audience than the mainframes otherwise required to utilise the DAP led ICL to estimate total sales of 1000 systems by 1986 at a unit cost of £25,000. Although the initial concept did not establish the nature of this DAP configuration, whether it would be a separate networked device accessible from the PERQ or integral to the PERQ itself, input from research users steered the design towards the latter arrangement, motivated by the possibilities of the DAP's own memory providing the framebuffer for the PERQ's colour display.[6]

Disputes over funding and project ownership, concerns about the lack of readiness of the desired Unix application environment for the PERQ, lobbying by GEC representatives to favour their own vector processing systems, and ICL's own concerns about the mishandling of commercially sensitive information all contributed to a lack of progress and lengthening delays to the delivery of prototypes. Estimates of mid-1983 deliveries became dates in the first half of 1984 and then the start of 1985. Eventually, experiencing problems with the data connection between the PERQ-DAP memory and the display, and with ICL having "little technical experience in this area", the company proposed dropping the display integration from the product until funding could be secured to develop and restore this feature.[6]

Eventually, the concept resurfaced as the DAP 510 and 610 products from the spin-off company Active Memory Technology, these arriving in 1988 and 1990 respectively and providing DAP capabilities to Sun and VAX workstations.[7]

A ruggedised military version was called the Mil-DAP.[8][9]

See also

References

  1. ^ Gordon G Scarrott (Summer 1995). "From Torsional Mode Delay Lines to DAP". Computer Resurrection (12).
  2. ^ Stewart Reddaway (Spring 2004). "Letter to the editor". Computer Resurrection. 48 (33): 149–150. doi:10.1016/j.lungcan.2004.09.011. PMID 15777984.
  3. ^ Parkinson, Dennis (17 June 1976). "Computers by the thousand". New Scientist. pp. 626–627. Retrieved 7 July 2024.
  4. ^ S. F. Reddaway (1973). "DAP—a distributed array processor" (PDF). ACM SIGARCH Computer Architecture News. 2 (4). ACM Press: 61–65. doi:10.1145/633642.803971.
  5. ^ "Cambridge Parallel to Debut Gamma MPP Box". Unigram/X. 14 November 1994. p. 7. Retrieved 3 December 2025.
  6. ^ a b "PERQ-DAP". Chilton Computing. 24 December 2022. Retrieved 4 June 2026.
  7. ^ "DAP 510 Brochures". Chilton Computing. 14 December 2022. Retrieved 4 June 2026.
  8. ^ Brian Russell (Summer 2001). "Mil-DAP Resurrection Project". Computer Resurrection (5).
  9. ^ "Parallel Processor Computer". Science Museum Group Collection. Retrieved 21 October 2025.

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