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File:TEI0185-03 Altera Agilex 5 E SoC FPGA AXE5 EAGLE DevKit.jpg
Sabtu, 2024-10-26 16:59:39

Agilex 5 E SoC FPGA (with Silkscreen) by Trenz Electronic and Arrow Electronics German AXE5-EAGLE Development Kit mit Altera Agilex 5 E SoC FPGA (mit Schablone)...

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File:Sipeed Tang Nano 9K FPGA.jpg
Minggu, 2023-09-24 15:45:07

license: 245 259 85 69 1280 493 Bouffalo BL702 422 146 176 165 1280 493 Gowin FPGA 1021 72 237 250 1280 493 HDMI output 51 133 162 150 1280 493 USB-C port for...

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File:Altera-StratixIIGX-FPGA.jpg
Minggu, 2025-04-13 12:01:42

this image myself, from a photograph. It is a sample of an FPGA. I was hoping to have the FPGA wiki page updated with this graphics o that it would be more...

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File:TEI1000 Altera Stratix 10 SX FPGA SoC Module.jpg
Jumat, 2024-07-19 22:56:01

498 gehört zu File:TEB1000 Altera Stratix 10 SX FPGA SoC Module CRUVI Baseboard.jpg English Altera Stratix 10 SX FPGA SoC Module by Trenz Electronic...

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File:CR00100 Altera MAX 10 FPGA HS LS CRUVI Baseboard.jpg
Kamis, 2025-11-06 06:26:57

English Baseboard with Altera MAX 10 FPGA and HS LS CRUVI slots by Trenz Electronic determination method or standard: SHA-1...

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File:TEI0003 Altera Cyclone 10 LP FPGA CYC1000 top view.jpg
Kamis, 2026-01-29 04:11:43

English CYC1000 Maker Board with Altera Cyclone 10 LP FPGA top view by Trenz Electronic and Arrow Electronics determination method or standard: SHA-1...

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File:TEB1000 Altera Stratix 10 SX FPGA SoC Module CRUVI Baseboard.jpg
Kamis, 2025-02-27 00:18:37

gehört zu File:TEI1000 Altera Stratix 10 SX FPGA SoC Module.jpg English Baseboard for Altera Stratix 10 SX FPGA SoC Module with HS and LS CRUVI slots by...

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File:TEI0050 Altera Cyclone V FPGA HS CRUVI CYC5000.jpg
Jumat, 2025-08-15 04:40:51

English CYC5000 Maker Board with Altera Cyclone V FPGA and HS CRUVI slot by Trenz Electronic and Arrow Electronics...

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File:TEI0009 Altera Cyclone 10 LP FPGA RefKit.jpg
Jumat, 2025-08-15 04:40:51

English Reference Kit with Altera Cyclone 10 LP FPGA and PMOD slots by Trenz Electronic and Arrow Electronics...

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File:CR00109 Altera Cyclone10 LP FPGA HS LS CRUVI Baseboard.jpg
Kamis, 2025-11-06 06:26:58

English Baseboard with Altera Cyclone10 LP FPGA and HS LS CRUVI slots by Trenz Electronic determination method or standard: SHA-1...

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File:TEI0001 Altera MAX 10 FPGA MAX1000 IoT Maker Board top view.jpg
Jumat, 2025-08-15 04:40:49

English MAX1000 IoT Maker Board with Altera MAX 10 FPGA top view by Trenz Electronic and Arrow Electronics...

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File:TEI0003 Altera Cyclone 10 LP FPGA CYC1000.jpg
Minggu, 2025-11-16 23:14:46

English CYC1000 Maker Board with Altera Cyclone 10 LP FPGA by Trenz Electronic and Arrow Electronics determination method or standard: SHA-1...

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File:TEI0009 Altera Cyclone 10 LP FPGA RefKit top view.jpg
Kamis, 2026-01-29 05:36:13

English Reference Kit with Altera Cyclone 10 LP FPGA and PMOD slots top view by Trenz Electronic and Arrow Electronics determination method or standard:...

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File:TEI0001 Altera MAX 10 FPGA MAX1000 IoT Maker Board.jpg
Jumat, 2025-08-15 04:40:50

English MAX1000 IoT Maker Board with Altera MAX 10 FPGA by Trenz Electronic and Arrow Electronics...

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File:TEI0185 Altera Agilex 5 E SoC FPGA AXE5 EAGLE DevKit.jpg
Jumat, 2025-08-15 04:40:51

English AXE5-EAGLE Development Kit with Altera Agilex 5 E SoC FPGA by Trenz Electronic and Arrow Electronics determination method or standard: SHA-1...

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File:NASA to Test Solution for Radiation-Tolerant Computing in Space (FPGA Board Rev4 10-18-2021).jpg
Rabu, 2026-05-06 13:22:13

https://images.nasa.gov/details/FPGA_Board_Rev4_10-18-2021 URL: http://images-assets.nasa.gov/image/FPGA_Board_Rev4_10-18-2021/FPGA_Board_Rev4_10-18-2021~orig...

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File:Sipeed.Tang nano 4K.FPGA.jpg
Rabu, 2026-01-07 02:40:22

(SoC like), including Cortex-M3 and FPGA. Français : System-in-package (comme un SoC), incluant le Cortex-M3 et le FPGA. 46 323 189 160 1280 720 USB-C 909...

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File:TEI0001 Altera MAX 10 FPGA MAX1000 IoT Maker Board box.jpg
Jumat, 2025-08-15 04:40:49

English MAX1000 IoT Maker Board with Altera MAX 10 FPGA unboxing by Trenz Electronic and Arrow Electronics...

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File:TEI0050 Altera Cyclone V FPGA HS CRUVI CYC5000 top view.jpg
Selasa, 2025-08-19 03:28:58

English CYC5000 Maker Board with Altera Cyclone V FPGA and HS CRUVI slot top view by Trenz Electronic and Arrow Electronics determination method or standard:...

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File:Xilinx FPGA XCV400E-PQ240.jpg
Kamis, 2025-05-29 01:28:54

Commons Attribution-Share Alike 4.0 truetrue English Xilinx FPGA XCV400E-PQ240 German Xilinx FPGA XCV400E-PQ240 Wikimedia username: Pedant01 URL: https://commons...

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File:WillWare Usb fpga layout.png
Senin, 2021-02-01 07:29:36

board with a 68013 processor (8051 core with USB interface) and a Xilinx FPGA. I place both the design and this image in the public domain. I have not...

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File:Altera Intel Stratix 10 SX SoC-FPGA 1SX040HH3F35I3VG.jpg
Minggu, 2025-06-22 04:25:17

English Altera Intel Stratix 10 SX SoC-FPGA Size: 378kLE DSP Blocks: 648 Multipliers: 1,296 Quad-core 64-bit ARM Cortex-A53 up to 1.5GHz Temperatur: -40°C...

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File:FPGA 20161103 DSC02770.jpg
Sabtu, 2025-09-13 15:06:21

Creative Commons Attribution 2.0 truetrue 18 August 2024 English German FPGA-IC author name string: ashley van steenacker publication date: 3 November...

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File:WillWare Usb fpga sch.png
Jumat, 2026-01-09 20:42:12

board with a 68013 processor (8051 core with USB interface) and a Xilinx FPGA. I place both the design and this image in the public domain. I have not...

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File:Altera-cyclone-1-fpga-HD.jpg
Kamis, 2024-08-15 20:12:03

https://creativecommons.org/licenses/by/3.0CC BY 3.0 Creative Commons Attribution 3.0 truetrue English Altera Cylcone FPGA determination method or standard: SHA-1...

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File:Altera Max-FPGA 20161103 DSC02778.jpg
Sabtu, 2025-07-19 20:03:22

Commons Attribution 2.0 truetrue 18 August 2024 English German Altera Max-FPGA author name string: ashley van steenacker publication date: 3 November 2016...

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File:Fluxo-fpga-generico.svg
Rabu, 2022-03-23 14:05:25

truetrue English Brazilian Portuguese Diagrama de um Fluxo Genérico de Projeto FPGA URL: https://commons.wikimedia.org/wiki/User:JoaoCarlosNB author name string:...

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File:Xilinx Spartan FPGA die shot.jpg
Senin, 2026-02-23 00:57:30

org/licenses/by-sa/4.0CC BY-SA 4.0 Creative Commons Attribution-Share Alike 4.0 truetrue English Xilinx Spartan FPGA die shot. determination method or standard: SHA-1...

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File:Implementation of a fault tolerant control unit within an FPGA for space applications (IA implementationof109452494).pdf
Senin, 2020-08-03 14:44:47

within an FPGA for space applications   (  ) Author Perez Casanova, Gaspar M. Title Implementation of a fault tolerant control unit within an FPGA for space...

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File:Subband channelized radar detection and bandwidth estimation for FPGA implementation (IA subbandchanneliz1094524311).pdf
Selasa, 2025-12-09 19:32:50

estimation for FPGA implementation   (  ) Author Burke, Bryan T. Title Subband channelized radar detection and bandwidth estimation for FPGA implementation...

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File:Low-power fault tolerance for spacecraft FPGA-based numerical computing (IA lowpowerfaulttol1094510160).pdf
Minggu, 2026-03-08 13:55:11

for spacecraft FPGA-based numerical computing   (  ) Author Snodgrass, Joshua D. Title Low-power fault tolerance for spacecraft FPGA-based numerical...

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File:FPGA based compensation method for correcting distortion in voltage inverters (IA fpgabasedcompens109453026).pdf
Minggu, 2024-08-18 12:28:36

FPGA based compensation method for correcting distortion in voltage inverters   (  ) Author Williamson, Kenya Dewitt. Title FPGA based compensation method...

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File:RESEARCH, DEVELOPMENT AND TESTING OF A FAULT-TOLERANT FPGA-BASED SEQUENCER FOR CUBESAT LAUNCHING APPLICATIONS (IA researchdevelopm1094532882).pdf
Minggu, 2024-08-18 01:12:07

RESEARCH, DEVELOPMENT AND TESTING OF A FAULT-TOLERANT FPGA-BASED SEQUENCER FOR CUBESAT LAUNCHING APPLICATIONS   (  ) Author Parobek, Lucas S. Title RESEARCH...

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File:Modeling, simulation and implementation of a non-coherent binary-frequency-shift-keying (BFSK) receiver-transmitter into a field programmable gate array (FPGA) (IA modelingsimulati109452098).pdf
Minggu, 2024-08-18 17:09:04

(BFSK) receiver-transmitter into a field programmable gate array (FPGA)   (  ) Author Svenningsen, Juan P. Title Modeling, simulation and implementation...

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File:Adaptation of a fault–tolerant FPGA–based launch sequencer as a CubeSat payload processor (IA adaptationoffaul1094542634).pdf
Minggu, 2024-08-18 18:54:07

fault–tolerant FPGA–based launch sequencer as a CubeSat payload processor   (  ) Author Goff, Jordan K. Title Adaptation of a fault–tolerant FPGA–based launch...

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File:Rack for FPGA BiXBiT.jpg
Kamis, 2025-11-20 17:02:36

org/licenses/by/4.0CC BY 4.0 Creative Commons Attribution 4.0 truetrue English cell for FPGA, cell on immersion cooling, farm for immersion liquid, farm in immersion...

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File:Fault-tolerant sequencer using FPGA-based logic designs for space applications (IA faulttolerantseq1094538884).pdf
Rabu, 2020-09-30 07:39:07

sequencer using FPGA-based logic designs for space applications   (  ) Author Brandt, Jason J. Title Fault-tolerant sequencer using FPGA-based logic designs...

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File:COPACOBANA FPGA BOARD.jpg
Selasa, 2017-10-24 09:33:36

infringement. See Wikipedia:Non-free content and Wikipedia:Copyrights. Fair use //en.wikipedia.org/wiki/File:COPACOBANA_FPGA_BOARD.jpg true Fair use true...

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File:Field programmable gate array (FPGA) based software defined radio (SDR) design (IA fieldprogrammabl109454811).pdf
Minggu, 2026-03-29 07:34:40

programmable gate array (FPGA) based software defined radio (SDR) design   (  ) Author Wright, Durke A. Title Field programmable gate array (FPGA) based software...

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File:Modeling and simulation of a non-coherent frequency shift keying transceiver using a Field Programmable Gate Array (FPGA) (IA modelingndsimula109453921).pdf
Sabtu, 2024-08-17 04:48:06

frequency shift keying transceiver using a Field Programmable Gate Array (FPGA)   (  ) Author Voskakis, Konstantinos. Title Modeling and simulation of a...

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File:LibraryOfSymbol.svg
Sabtu, 2026-04-11 10:12:09

URL: https://commons.wikimedia.org/wiki/user:FPGA_ALT Wikimedia username: FPGA ALT author name string: FPGA ALT determination method or standard: SHA-1...

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File:Migration of a real-time optimal-control algorithm from MATLAB TM to Field Programmable Gate Array (FPGA) (IA migrationofrealt109451768).pdf
Senin, 2025-04-07 18:49:45

Array (FPGA)   (  ) Author Moon, Ron L. Title Migration of a real-time optimal-control algorithm from MATLAB TM to Field Programmable Gate Array (FPGA) Publisher...

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File:英特尔FPGA中国创新中心.jpg
Sabtu, 2024-07-06 02:16:00

Commons Attribution-Share Alike 4.0 truetrue English Simplified Chinese 英特尔FPGA中国创新中心 author name string: 重庆轨交18 Wikimedia username: 重庆轨交18 URL: https://commons...

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File:Ettus USRP Onboard FPGA.jpg
Jumat, 2026-02-06 15:12:52

Attribution-Share Alike 2.0 truetrue 18 August 2024 English German Altera Cyclone-FPGA author name string: Synthesis Studios operator: Flickr described at URL:...

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File:RockyLogic Ant8, Xilinx Spartan XC2S30 FPGA.jpg
Sabtu, 2026-01-17 20:07:22

Attribution-Share Alike 2.0 truetrue 18 August 2024 English German Xilinx Spartan XC2S30 FPGA author name string: Uwe Hermann operator: Flickr described at URL: https://www...

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File:The design of a programmable convolutional encoder using VHDL and an FPGA (IA designofprogramm00snel).pdf
Kamis, 2024-10-24 08:36:26

using VHDL and an FPGA   (  ) Author Snelgrove, Andrew H. Title The design of a programmable convolutional encoder using VHDL and an FPGA Publisher Monterey...

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File:FPGA implementation of robust symmetrical number system in high-speed folding analog-to-digital converters (IA fpgaimplementati109455062).pdf
Sabtu, 2024-08-17 00:34:44

FPGA implementation of robust symmetrical number system in high-speed folding analog-to-digital converters   (  ) Author Lim, Han Wei Title FPGA implementation...

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File:Sl-Jolanda Čeplak.oga
Sabtu, 2021-09-18 10:07:12

was here. All following user names refer to en.wikipedia. 2004-09-06 05:20 Fpga 0×0× (16542 bytes) Slovenian pronounciation of [[Jolanda Ceplak]] English...

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File:ShieldArduinoFPGA.png
Kamis, 2022-06-09 16:39:20

4.0 truetrue English French Capteur de débit optique ADNS 3080 et carte FPGA URL: https://commons.wikimedia.org/wiki/user:SergeMoutou Wikimedia username:...

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File:Sl-Jure Franko.oga
Sabtu, 2025-10-11 02:38:55

wikipedia. Upload date | User | Bytes | Dimensions | Comment 2004-09-07 05:03:16 | Fpga | 15493 | 0×0 | Slovenian pronounciation of [[Jure Franko]] English...

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File:Sl-Leon Štukelj.oga
Kamis, 2020-10-29 03:22:32

wikipedia. Upload date | User | Bytes | Dimensions | Comment 2004-09-06 05:23:02 | Fpga | 15534 | 0×0 | Slovenian pronounciation of [[Leon Stukelj]] English...

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File:Sl-Srečko Katanec.oga
Minggu, 2025-10-05 14:50:24

Upload date | User | Bytes | Dimensions | Comment 2004-09-06 05:43:07 | Fpga | 16404 | 0×0 | Slovenian pronounciation of [[Srecko Katanec]] English determination...

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File:Sl-Rok Petrovič.oga
Selasa, 2021-05-11 14:45:59

wikipedia. Upload date | User | Bytes | Dimensions | Comment 2004-09-06 05:40:42 | Fpga | 16515 | 0×0 | Slovenian pronounciation of [[Rok Petrovic]] English...

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File:Sl-Martin Strel.oga
Selasa, 2024-09-17 01:44:50

pronunciation of Martin Strel I recorded the file myself 05:25, 6 September 2004 . . Fpga (Talk | contribs) . . 0×0 (16,774 bytes) (Slovenian pronounciation of Martin...

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File:Yudit-screenshot.png
Rabu, 2024-08-21 22:34:46

description page was here. All following user names refer to en.wikipedia. 2005-02-24 10:07 Fpga 741×507× (34519 bytes) a screenshot of [[Yudit]] English...

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File:Logic block.gif
Rabu, 2025-02-26 07:39:50

FPGA Logic Block from en:Image:Logic block.gif Author: en:User:Ignaciomella English determination method or standard: SHA-1...

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File:Sl-Mladen Rudonja.oga
Senin, 2025-09-29 03:10:04

Upload date | User | Bytes | Dimensions | Comment 2004-09-06 05:35:38 | Fpga | 16440 | 0×0 | Slovenian pronounciation of [[Mladen Rudonja]] English determination...

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File:Sl-Zlatko Zahovič.oga
Kamis, 2020-10-29 03:23:01

wikipedia. Upload date | User | Bytes | Dimensions | Comment 2004-09-07 05:06:47 | Fpga | 15875 | 0×0 | Slovenian pronounciation of [[Zlatko Zahovic]] English...

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File:Logic block pins.svg
Sabtu, 2017-07-15 23:34:46

An example of the connections of an FPGA logic block. Created by User:Joelholdsworth in Inkscape. This image is inelligable for copyright.  This W3C-unspecified...

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File:Microsemi logo.svg
Rabu, 2026-06-03 07:16:16

microchip.com/downloads/aemDocuments/documents/FPGA/ApplicationNotes/ApplicationNotes/PolarFire_FPGA_1G_Ethernet_Loopback_Using_IOD_CDR.pdf * Farbinfo:...

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File:Efficient implementation of filtering and resampling operations on Field Programmable Gate Arrays (FPGAs) for Software Defined Radio (SDR) (IA efficientimpleme109453847).pdf
Selasa, 2026-06-02 18:55:06

filtering and resampling operations on Field Programmable Gate Arrays (FPGAs) for Software Defined Radio (SDR)   (  ) Author Giannoulis, Georgios Title...

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File:EsLibre 2023 P60 - Carlos Alberto Ruiz Naranjo, Ismael Pérez Rojo - TerosHDL – un IDE para FPGA y ASIC.webm
Jumat, 2026-05-29 06:33:42

2023] Carlos Alberto Ruiz Naranjo, Ismael Pérez Rojo - TerosHDL: un IDE para FPGA y ASIC author name string: German Martinez Wikimedia username: Germaaan URL:...

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File:Sl-Bojan Križaj.oga
Kamis, 2024-07-04 23:13:31

en.wikipedia. Upload date | User | Bytes | Dimensions | Comment 2004-09-06 05:18:11 | Fpga | 15640 | 0×0 | Pronounciation of [[Bojan Krizaj]] English...

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File:Symmetrical residue-to-binary conversion algorithm, pipelined FPGA implementation, and testing logic for use in high-speed folding digitizers (IA symmetricalresid109451762).pdf
Minggu, 2024-08-18 17:31:53

Symmetrical residue-to-binary conversion algorithm, pipelined FPGA implementation, and testing logic for use in high-speed folding digitizers   (  ) Author...

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File:Sl-Mateja Svet.oga
Kamis, 2026-04-09 13:45:19

Upload date | User | Bytes | Dimensions | Comment 2004-09-06 05:29:00 | Fpga | 15895 | 0×0 | Slovenian pronouciation of [[Mateja Svet]] English determination...

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File:Gowin-GW1NSR-LV4C.jpg
Sabtu, 2025-11-15 17:29:20

Attribution-Share Alike 4.0 truetrue English Gowin GW1NSR-LV4C FPGA integrated circuit French circuit intégré FPGA Gowin GW1NSR-LV4C manufacturer: Gowin author name...

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File:Gowin-GW1NR-LV9.jpg
Rabu, 2025-09-17 05:40:22

Attribution-Share Alike 4.0 truetrue English Gowin GW1NR-LV9 FPGA SoC French Gowin GW1NR-LV9 FPGA SoC manufacturer: Gowin Semiconductor author name string:...

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File:Kicad Pcbnew screenshot.jpg
Senin, 2025-11-24 12:39:59

Software (GPL). The printed circuit board under view is a board with an FPGA, released as free hardware design under GPL (s2proto at FPGALibre). Original...

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File:Design, construction and analysis of a 14-bit direct digital antenna utilizing optical sampling and optimum SNS encoding (IA designconstructi00ring).pdf
Sabtu, 2024-08-17 00:03:15

Field Programmable Gate Array (FPGA) for decoding into a 14 bit digital representation of the input RF voltage. Modern day FPGA devices are rapidly becoming...

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File:Kicad Pcbnew3D screenshot.jpg
Senin, 2020-09-14 10:33:44

Software (GPL). The printed circuit board under view is a board with an FPGA, released as free hardware design under GPL (s2proto at FPGALibre). Original...

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File:Station.png
Sabtu, 2025-08-23 20:24:09

portfolio optimization. Cryogenics and FPGA Integration Study of cryogenic systems and their interaction with FPGA hardware. This component will explore...

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File:Implementation of a Configurable Fault Tolerant Processor (CFTP) using Internal Triple Modular Redundancy (TMR) (IA implementationof109451743).pdf
Senin, 2025-10-13 10:42:38

reconfigurable digital systems that utilize Field Programmable Gate Arrays (FPGA) because both the configuration and the data are susceptible to SEUs. Several...

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File:Package bottom - Altera EPF8636AL - John McMaster.jpg
Kamis, 2024-10-17 03:55:22

https://creativecommons.org/licenses/by/4.0CC BY 4.0 Creative Commons Attribution 4.0 truetrue English German Der Altera EPF8636AL, ein FPGA um 1995...

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File:Improved data acquisition architecture for an LLC converter (IA improveddatacqui1094543967).pdf
Senin, 2025-01-06 07:56:22

the FPGA and receives three data signals from the FPGA. The second solution is the ADS1000, which uses the I2C protocol to communicate with the FPGA. The...

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File:Kicad Pcbnew screenshot.PNG
Rabu, 2026-04-29 14:35:02

Software (GPL). The printed circuit board under view is a board with an FPGA, released as free hardware design under GPL (s2proto at FPGALibre). Original...

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File:Overview ch2x - Actel A1020B - John McMaster.jpg
Selasa, 2025-09-23 03:47:08

vendor actel, type logic, type logic/programmable, type logic/programmable/fpga, year 1993, tech 1000nm, foundry lockheed, foundry ti Package Top: Actel...

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File:Design and development of a configurable fault-tolerant processor (CFTP) for space applications (IA designnddevelopm10945997).pdf
Kamis, 2026-04-23 12:12:38

(TMR) System-on-a-Chip (SOC) utilizing Field Programmable Gate Arrays (FPGAs) provides a viable solution for space based systems. The Configurable Fault...

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File:Implementation of Configurable Fault Tolerant Processor (CFTP) experiments (IA implementationof109452380).pdf
Minggu, 2024-08-18 04:54:28

using Field Programmable Gate Arrays (FPGA) to include designs that mitigate the radiation hazards posed to FPGAs. A significant challenge faced by the...

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File:Radiation testing of the Configurable Fault Tolerant Processor (CFTP) for space-based applications (IA radiationtesting109451829).pdf
Senin, 2025-10-20 12:58:03

Programmable Gate Arrays (FPGAs) provide a reconfigurable asset in the design of space computing. â Hardwareâ configurations are stored in FPGA memory elements...

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File:Mit20x - Altera EPF8636AL - John McMaster.jpg
Rabu, 2024-10-16 02:19:00

https://creativecommons.org/licenses/by/4.0CC BY 4.0 Creative Commons Attribution 4.0 truetrue English German Der Altera EPF8636AL, ein FPGA um 1995...

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File:Package top - Altera EPF8636AL - John McMaster.jpg
Rabu, 2024-10-16 02:18:39

https://creativecommons.org/licenses/by/4.0CC BY 4.0 Creative Commons Attribution 4.0 truetrue English German Der Altera EPF8636AL, ein FPGA um 1995...

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File:IMPLEMENTATION OF THE FAST FOURIER TRANSFORM ONBOARD CFTP-7 SPACE EXPERIMENT (IA implementationof1094559613).pdf
Minggu, 2024-08-18 06:11:23

Postgraduate School. This processor consists of a Field Programmable Gate Array (FPGA), which may be reprogrammed by receiving a signal from a source external...

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File:Logo mit20x - Altera EPF8636AL - John McMaster.jpg
Sabtu, 2025-04-12 14:58:07

https://creativecommons.org/licenses/by/4.0CC BY 4.0 Creative Commons Attribution 4.0 truetrue English German Der Altera EPF8636AL, ein FPGA um 1995...

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File:Testing and evaluation of the configurable fault tolerant processor (CFTP) for space-based application (IA testingndevaluat109456189).pdf
Minggu, 2024-08-18 04:08:31

BIST, as well as a conceptual design for a Field Programmable Gate Array (FPGA) BIST. These designs are stored on board the CFTP and are made to operate...

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File:Actel logo mit20x - Actel A1020B - John McMaster.jpg
Kamis, 2025-08-14 12:54:05

vendor actel, type logic, type logic/programmable, type logic/programmable/fpga, year 1993, tech 1000nm, foundry lockheed, foundry ti Package Top: Actel...

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File:CRUVI Logo.png
Senin, 2025-11-17 01:23:41

mit einem Durchmesser von 2 mm mechanisch fixiert. English German CRUVI FPGA Card Logo das sich auf die Hälfte eines sechseckigen Schraubenkopfes bezieht...

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File:Kicad Pcbnew3D screenshot.PNG
Senin, 2025-12-01 01:15:59

Software (GPL). The printed circuit board under view is a board with an FPGA, released as free hardware design under GPL (s2proto at FPGALibre). Original...

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File:Implementation of the configurable fault tolerant system experiment on NPSAT-1 (IA implementationof1094548536).pdf
Minggu, 2024-08-25 16:04:41

Triple-Modular Redundancy (GTMR); NPSAT-1; Field-Programmable Gate Array (FPGA); Single Event Effect (SEE); cache; memory controller; error mitigation;...

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File:MODULARIZATION OF TRIPLE FAULT-TOLERANT DESIGNS (TFTD) (IA modularizationof1094563984).pdf
Senin, 2025-02-10 03:03:34

processors. The method for this consisted of a field-programmable gate array (FPGA) being designed into a system which is capable of detecting and then correcting...

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File:Use of the Reduced Precision Redundancy (RPR) method in a radix4 FFT implementation (IA useofreducedprec109455162).pdf
Kamis, 2026-05-21 08:56:46

precision redundancy (RPR), as a new method for improving fault tolerance in FPGAs, appears promising in replacing triple modular redundancy (TMR) to prevent...

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File:Package top - Actel A1020B - John McMaster.jpg
Selasa, 2026-03-31 14:42:30

vendor actel, type logic, type logic/programmable, type logic/programmable/fpga, year 1993, tech 1000nm, foundry lockheed, foundry ti Package Top: Actel...

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File:FIELD PROGRAMMABLE GATE ARRAY HIGH CAPACITY TECHNOLOGY FOR RADAR AND COUNTER-RADAR DRFM SIGNAL PROCESSING (IA fieldprogrammabl1094559670).pdf
Sabtu, 2024-08-24 21:02:10

processors. This thesis investigates high-capacity field-programmable gate array (FPGA) technology to enable on-the-fly flexibility and reconfigurability for both...

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File:Field programmable gate array hysteresis control of parallel connected inverters (IA fieldprogrammabl109452826).pdf
Minggu, 2024-08-18 05:55:54

Description This thesis presents the use of a Field Programmable Gate Array (FPGA) to control two Commercial-Off-The-Shelf (COTS) Power Electronic Building...

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File:Data acquisition via RS-232 and universal serial bus from a field programmable gate array (IA datacquisitionvi109454496).pdf
Minggu, 2024-08-18 16:00:41

California: Naval Postgraduate School Description A Field Programmable Gate Array (FPGA) offers a flexible solution for transferring data obtained from hardware...

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File:Design and implementation of a Motor Incremental Shaft Encoder (IA designndimplemen109453892).pdf
Sabtu, 2025-08-02 16:18:13

Student Design Center (SDC). The SDC utilizes Field Programmable Gate Array (FPGA) technology for digital control of motor applications. One of the key factors...

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File:A field programmable gate array based software defined radio design for the space environment (IA afieldprogrammab109454495).pdf
Jumat, 2024-08-16 04:16:39

narrowband signal output. The design is based on a Field Programmable Gate Array (FPGA), which is chosen for its reprogrammability, flexibility, and our ability...

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File:A systematic software, firmware, and hardware codesign methodology for digital signal processing (IA asystematicsoftw1094541358).pdf
Selasa, 2024-08-20 01:52:27

processing; design pattern; embedded systems; firmware/software/hardware codesign; FPGA; OR tree; hidden Markov model; polyphase DFT filter banks; post-deserialization...

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File:Ti logo mit20x - Actel A1020B - John McMaster.jpg
Sabtu, 2025-06-21 03:17:02

vendor actel, type logic, type logic/programmable, type logic/programmable/fpga, year 1993, tech 1000nm, foundry lockheed, foundry ti Package Top: Actel...

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File:Field programmable gate array control of systems in graduate student laboratories (IA fieldprogrammabl109454199).pdf
Minggu, 2024-08-18 14:52:55

Programmable Gate Array (FPGA) control of power electronics. Utilizing Mathworks® and XILINX® software to interface the FPGA with a voltage source converter...

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File:Package bottom - Actel A1020B - John McMaster.jpg
Sabtu, 2025-05-31 05:03:45

vendor actel, type logic, type logic/programmable, type logic/programmable/fpga, year 1993, tech 1000nm, foundry lockheed, foundry ti Package Top: Actel...

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File:Implementation of a configurable fault tolerant processor (CFTP) (IA implementationof109451101).pdf
Jumat, 2026-01-23 02:15:32

Field Programmable Gate Arrays (FPGAs) allow for emulation of complex logic circuits, such as microprocessors. FPGAs can be repro-grammed as necessary...

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File:Design, analysis and construction of a high voltage capacitor charging supply (IA designnalysisndc109454019).pdf
Sabtu, 2026-04-11 16:03:50

voltage capacitor to 9 kV in two minutes. The power supply controller is an FPGA (Field Programmable Gate Array) with embedded control to ensure the safe...

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File:Extending Open Architecture (OA) to the physical layer (IA extendingopenarc109454143).pdf
Selasa, 2024-08-27 02:20:15

key parameters and metrics associated with field programmable gate array (FPGA) devices, which can be utilized in future integrated weapon systems (IWS)...

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File:Ch2x - Altera EPF8636AL - John McMaster.jpg
Minggu, 2025-11-23 05:19:44

org/licenses/by/4.0CC BY 4.0 Creative Commons Attribution 4.0 truetrue English German Der Altera EPF8636AL, ein FPGA um 1995 determination method or standard: SHA-1...

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File:Release Note for BullSequana S TS 44.02.pdf
Sabtu, 2023-06-03 19:20:36

UNB0_FPGA firmware bsmFWupg.sh -a upg -<IP address> -u <user> -p <pwd> -E UNB0_FPGA -d /tmp/TS24 -F FPGA_UNB_Image_wub_0_8_0_0.emm -M 16 f. UNB1_FPGA firmware...

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File:Clb mit20x - Actel A1020B - John McMaster.jpg
Minggu, 2025-12-07 04:16:35

vendor actel, type logic, type logic/programmable, type logic/programmable/fpga, year 1993, tech 1000nm, foundry lockheed, foundry ti Package Top: Actel...

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File:Design, simulation, and preliminary testing of a 20 ampere energy management system (IA designsimulation1094545902).pdf
Sabtu, 2024-10-05 13:12:04

the FPGA through the JTAG-USB interface. The FPGA board then interacts with the EMS through the digital-to-analog converters (DACs) on the FPGA interface...

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File:A fixed-point phase lock loop in a software defined radio (IA afixedpointphase109455054).pdf
Minggu, 2024-08-18 05:12:39

software, and putting those functions on a Field Programmable Gate Array (FPGA) chip, users will have the ability to download mission specific radio capabilities...

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File:Extending the dynamic range of a photonic RSNS ADC using a segmentation approach (IA extendingdynamic109455492).pdf
Minggu, 2024-08-25 16:45:43

RSNS-to-binary conversion algorithm in a field programmable gate array (FPGA). By including the two additional sequence lengths, the extended-RSNS preprocessing...

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File:Fault tolerant microcontroller for the configurable Fault Tolerant Processor (IA faulttolerantmic109453989).pdf
Senin, 2024-08-26 05:18:15

a single Field Programmable Gate Array. It includes RAM, microprocessor, FPGA configuration and configuration readback modules, PC/104 interface module...

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File:An all-digital image synthesizer for countering high-resolution imaging radars (IA alldigitalimages00ekes).pdf
Rabu, 2024-08-21 01:07:22

Host (PC) 64 b. FPGA DIS 65 c. FPGA DIS Hardware 66 d. Processing DRFM-Phase Data 67 FPGA DIS Schematic 71 FPGA Hierarchy a. Top-Level...

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File:Analysis of voltage and current signal processing in a Li-ion Battery Management System (IA analysisofvoltag109455185).pdf
Senin, 2024-08-26 06:20:58

its processing by a voltage-to-frequency converter are analyzed and the FPGA programming is described. The accuracy of the collected data is shown and...

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File:Release Note for BullSequana S TS 44.01.pdf
Jumat, 2026-06-05 07:42:49

UNB0_FPGA firmware bsmFWupg.sh -a upg -<IP address> -u <user> -p <pwd> -E UNB0_FPGA -d /tmp/TS24 -F FPGA_UNB_Image_wub_0_8_0_0.emm -M 16 f. UNB1_FPGA firmware...

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File:Xerox ColorQube 8570 - Main controller - Xilinx Spartan XC3S400A-0205.jpg
Sabtu, 2024-08-17 18:05:23

English Xilinx Spartan XC3S400A - Spartan-3A FPGA Family German Xilinx Spartan XC3S400A - Spartan-3A FPGA-Familie manufacturer: Xilinx shape: square color:...

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File:Reduced precision redundancy applied to arithmetic operations in field programmable gate arrays for satellite control and sensor systems (IA reducedprecision109453719).pdf
Minggu, 2024-08-25 22:29:04

SUBJECT TERMS Reduced Precision Redundancy, RPR, Fault Tolerance, SEU, SEE, FPGA, Reprogrammable Computers, On-Board Processing, Radiation Effects, Software...

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File:An analysis of cryptographically significant Boolean functions with high correlation immunity by reconfigurable computer (IA annalysisofcrypt109455003).pdf
Rabu, 2024-08-28 01:18:34

then executed on an FPGA on the SRC-6 reconfigurable computer. A similar program was written in Verilog and executed on the FPGA. By taking advantage...

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File:Optimization of a cyclostationary signal processing algorithm using multiple field programmable gate arrays on the SRC-6 reconfigurable computer (IA optimizationofcy109454601).pdf
Jumat, 2024-12-13 02:17:22

of the implementation is to utilize dual field programmable gate arrays (FPGAs) within a single multi-adaptive processor (MAP). Hardware decisions are...

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File:A model for minimizing numeric function generator complexity and delay (IA amodelforminimiz109453118).pdf
Minggu, 2024-08-18 08:54:15

various NFG configurations implemented on Field-Programmable Gate Arrays (FPGAs). The algorithms and estimation techniques apply to different NFG architectures...

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File:Operating standby redundant controller to improve voltage source inverter reliability (IA operatingstandby109453069).pdf
Rabu, 2024-08-21 08:34:58

The simulated results were then verified in lab hardware comprising two FPGAs, a three phase rectifier, an LC filter, and a resistive load. Both simulated...

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File:Ingeniería electrónica eléctrica.png
Rabu, 2025-02-19 02:12:37

as the original. https://creativecommons.org/licenses/by-sa/4.0CC BY-SA 4.0 Creative Commons Attribution-Share Alike 4.0 truetrue English FPGA_Xilinx...

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File:A compression algorithm for field programmable gate arrays in the space environment (IA acompressionlgor1094510623).pdf
Minggu, 2024-08-18 18:51:12

bitcode, which defines the resulting FPGA configuration. This bitcode is finally loaded onto the target FPGA. The target FPGA for this research is the Virtex™-II...

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File:High Speed Quantum Key Distribution Over Optical Fiber Network System (IA jresv114n3p149).pdf
Minggu, 2024-12-08 12:28:35

array (FPGA) chip and a pair of serializer/deserializer (SerDes) chips. Each SerDes can support up to four bi-directional Gigabit channels. The FPGA exchanges...

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File:Xilinx Artix7 XC7A100T FGG484 on PCB.jpg
Rabu, 2024-12-25 17:23:40

Creative Commons Attribution-Share Alike 4.0 truetrue English A Xilinx Artix-7 FPGA (XC7A100T-FGG484) on a PCB assembly URL: https://commons.wikimedia.org/wiki/user:S03311251...

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File:Implementation of a high-speed numeric function generator on a COTS reconfigurable computer (IA implementationof109453566).pdf
Minggu, 2020-08-30 02:15:48

shows how this first order approximation technique was implemented on an FPGA-based COTS reconfigurable computer. MATLAB routines were developed to approximate...

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File:Development of three-phase source inverter for research and laboratories (IA developmentofthr109455816).pdf
Sabtu, 2026-04-25 20:37:28

loss analysis of a three-phase VSI and the hardware interface between the FPGA and the three-phase VSI used for research and laboratory procedures at NPS...

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File:Implementation of a Quadrature Mirror Filter Bank on an SRC reconfigurable computer for real-time signal processing (IA implementationof109452646).pdf
Selasa, 2026-04-07 15:36:52

......14 C. XILINX FPGA ...............................................................................................15 1. FPGA Structure ............

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File:Suitability of the SRC-6E reconfigurable computing system for generating false radar image (IA suitabilityofsrc109451547).pdf
Minggu, 2024-08-18 19:15:43

appendices. 14. SUBJECT TERMS Benchmark, Reconfigurable Computing, VHDL, SRC-6E, FPGA, False Radar Target Synthesis 15. NUMBER OF PAGES 149 16. PRICE CODE 17...

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File:Design recovery and implementation of the AYK-14 VHSIC processor module adapter with field programmable gate array technology (IA designrecoverynd109453992).pdf
Kamis, 2025-02-27 08:07:18

outdated avionics system to economically upgrade its capabilities through the FPGA implementation of a binary compatible replacement. The system targeted is...

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File:Covert half duplex data link using radar-embedded communications with various modulation schemes (IA coverthalfduplex1094556866).pdf
Minggu, 2024-08-18 12:24:29

Estimation, Demodulation Procedure for FPGA Implementation. Adapted from [3]. . . . . . . . . . . . . . . . . 18 Kintex 7 FPGA Development Kit with Digital Signal...

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File:Modeling and analysis of a constant power series-loaded resonant converter (IA modelingndnalysi109455717).pdf
Minggu, 2021-12-19 13:48:32

..................................................................25 B. FPGA CONTROLLER ................................................................

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File:A pulsed power system design using lithium-ion batteries and one charger per battery (IA apulsedpowersyst109454443).pdf
Minggu, 2024-08-18 21:54:34

charging methodologies and types of batteries with only a change of the FPGA software. The BMS design uses lithium-ion batteries as the energy storage...

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File:Implementation of a cyclostationary spectral analysis algorithm on an SRC reconfigurable computer for real-time signal processing (IA implementationof109454169).pdf
Minggu, 2024-08-18 02:53:06

MAPs are connected together, each FPGA can also communicate with the FPGAs on other MAPs. More information on the FPGA structure of the SRC-6 is found in...

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File:Design, implementation, and testing of a software interface between the AN-SPS-65(V)1 radar and the SRC-6E reconfigurable computer (IA designimplementa109452287).pdf
Kamis, 2026-04-23 11:55:31

P o r t SNAP Port Control FPGA B FPGA OBM MAP0 Processor C h a i n C h a i n P o r t P o r t Control FPGA FPGA OBM MAP1 Processor C h a i...

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File:Designing a sensorless torque estimator for direct torque control of an induction motor (IA designingsensorl109454615).pdf
Kamis, 2026-04-23 14:21:18

the torque estimator is verified using the Field Programmable Gate Array (FPGA). Furthermore, using the proper hardware and software, realistic conclusions...

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File:Release Note for BullSequana S TS 44.03.pdf
Jumat, 2026-06-05 07:42:50

UNB0_FPGA firmware bsmFWupg.sh -a upg -<IP address> -u <user> -p <pwd> -E UNB0_FPGA -d /tmp/TS24 -F FPGA_UNB_Image_wub_0_8_0_0.emm -M 16 f. UNB1_FPGA firmware...

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File:Wirelessly networked opportunistic digital phased array system analysis and development of a 2.4 GHz demonstrator (IA wirelesslynetwor109452424).pdf
Rabu, 2024-08-21 08:45:18

Reconfigurable Input and Output (cRIO) and Field Programmable Gate Array (FPGA) modules. The main software, written in LabVIEW, allowed the test bench to...

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File:XC4013E.jpg
Senin, 2025-09-29 06:31:37

BY-SA 4.0 Creative Commons Attribution-Share Alike 4.0 truetrue English FPGA (Field Programmable Gate Array) object of statement has role: photographer...

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File:SIGNAL RECOVERY AND DETECTION OF CERTAIN WIDEBAND SIGNALS USING MULTIPLE LOW-RATE ADCS (IA signalrecoveryan1094560415).pdf
Selasa, 2025-12-02 19:37:10

frequency transform FIR finite-impulse response FFT fast Fourier transform FPGA field-programmable gate array HDL hardware description language IC integrated...

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File:Finding bent functions using genetic algorithms (IA findingbentfunct109454621).pdf
Minggu, 2024-08-18 05:32:50

Bent Functions, Reconfigurable Computer, Field Programmable Gate Array (FPGA), Cryptology 17. SECURITY CLASSIFICATION OF REPORT Unclassified 18. SECURITY...

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File:Design implementation into field programmable gate arrays. (IA designimplementa00mess).pdf
Kamis, 2026-04-23 14:02:07

explores the implementation of design using the Field Programmable Gate Array (FPGA). In particular, this thesis utilizes the XILINX development system tools...

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File:Wind turbine power generation emulation via doubly fed induction generator control (IA windturbinepower109454448).pdf
Senin, 2024-09-09 02:28:18

voltage (VDC), and sends the sensed inputs to a Field Programmable Gate Array (FPGA), which is used to derive control of VDC so that it is maintained at 200V...

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File:An analysis of bent function properties using the transeunt triangle and the SRC-6 reconfigurable computer (IA annalysisofbentf109454617).pdf
Rabu, 2024-08-28 00:11:39

up to six thousand times faster than a PC, is limited by the speed of the FPGA, 100 MHz. Functions with up to six variables were tested. Predictions on...

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File:1.SOC.2.C.CMOS.Digital.20130318.2.pdf
Senin, 2023-03-13 15:53:10

Logic) GAL (Generic Logic Array) CPLD (Complex Programmable Logic Device) FPGA (Field Programmable Gate Array) Digital Logic Imp (2C) 12 Young Won Lim...

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File:Implementation of a fault tolerant computing testbed- a tool for the analysis of hardware and software fault handling techniques (IA implementationof00summ).pdf
Sabtu, 2025-01-11 03:34:19

Voter 72 d) B. 53 FPG A DESIGN 1. FPGA Selection 2. Address Voter, Memory Decoder, and Timer c) 3. FPGA FPGA 76 a) Control Voter 76 b) Data...

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File:2011 11 07 Cyber Analytical Framework.pdf
Minggu, 2023-04-16 14:44:05

(FPGAs). 64 FPGA and 9 ASIC types across 12 subsystems. 78% of FPGAs and 66% of ASICs manufactured in China and Taiwan. JSF FPGA & ASIC Usage FPGA ...

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File:Sensor synchronization, geolocation and wireless communication in a shipboard opportunistic array (IA sensorsynchroniz109452870).pdf
Minggu, 2025-06-22 14:56:13

the FPGA hardware, another possibility is to xviii generate the LO signal from the FPGA and perform phase corrections directly using the FPGA. This...

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File:Journal.pone.0224149.pdf
Senin, 2025-02-10 17:44:10

FPGA for data processing, and an ARM Cortex A9 microprocessor. Although Red Pitaya software and FPGA modules are open source, the processor, the FPGA...

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File:ELINT signal processing on reconfigurable computers for detection and classification of LPI Emitters (IA elintsignalproce109452785).pdf
Selasa, 2026-05-26 19:52:14

simultaneously. d. FPGA The User Logic recently discussed is comprised of two Xilinx Virtex II Field Programmable Gate Arrays (FPGAs). These FPGAs are what make...

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File:Design and implementation of a mobile phone locator using software defined radio (IA designndimplemen109453256).pdf
Jumat, 2024-10-04 03:11:46

implementation must make use of faster hardware like field-programmable gate arrays (FPGA) in order to perform the calculations in real-time. Precision of the location...

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File:Various effects of embedded intrapulse communications on pulsed radar (IA variouseffectsof1094555625).pdf
Minggu, 2024-08-18 12:37:01

case by implementing the radar detector on a field-programmable gate array (FPGA) similar to what would be used in a radar receiver. In all cases, embedded...

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File:Feasibility analysis and design of a fault tolerant computing system- a TMR microprocessor system design of 64-Bit COTS microprocessors (IA feasibilitynalys1094510857).pdf
Kamis, 2020-08-20 05:19:26

42 V. PROGRAMMABLE LOGIC DESIGN A. FPGA DESIGN 1. FPGA Selection 2. Address/Control Voter, Memory Decoder FPGA a) Address/Control Voter b) Memory Decoder...

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File:Hardware interface to connect an AN-SPS-65 radar to an SRC-6E reconfigurable computer (IA hardwareinterfac109452206).pdf
Rabu, 2024-08-21 17:49:15

exceptions. The two most notable are the FPGA clock frequency and the input and output levels. Though the Virtex–II FPGAs are capable of operating with a 420–MHz...

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File:Nexys3 ILI9341.jpg
Kamis, 2026-03-12 06:12:04

English French Visuel pour notre réalisation de gestion d'un écran par un FPGA author name string: SergeMoutou URL: https://commons.wikimedia.org/wiki/User:SergeMoutou...

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File:TS24.01 fw update (1).pdf
Kamis, 2026-05-28 03:42:23

or TS22.03 proceed with step no. 2 1. Update all components (BMC, BIOS, FPGA, CPLD) to TS22.02 or TS22.03 (SHC 𐀀Maintenance 𐀀Firmware) 1 2. Copy...

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File:The circular pipeline achieving higher throughput in the search for bent functions (IA thecircularpipel109455204).pdf
Selasa, 2024-08-20 15:57:10

find. The implementation of a sieve on a field programmable gate array (FPGA) provides a high throughput (one function per clock) approach to searching...

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File:Xilinx Kintex7 XCKU025 on matrox grabber.jpg
Jumat, 2026-01-23 06:35:46

Creative Commons Attribution-Share Alike 4.0 truetrue English A Xilinx Kintex-7 FPGA (XCKU025-FFVA1156) on a Matrox image grabber URL: https://commons.wikimedia...

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File:H-bridge inverter loading analysis for an Energy Management System (IA hbridgeinverterl1094534706).pdf
Minggu, 2024-08-18 04:35:16

....................................7 A. FIELD PROGRAMMABLE GATE ARRAY (FPGA) ................................7 B. INSULATED GATE BIPOLAR TRANSISTOR (IGBT)...

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File:Wirelessly networked digital phased array analysis and development of a phase synchronization concept (IA wirelesslynetwor109453304).pdf
Jumat, 2025-08-08 01:42:51

..................................................................12 c. FPGA............................................................................

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File:FPGA-CAFE.jpg
Senin, 2026-03-30 10:06:39

DescriptionFPGA-CAFE.jpg FPGA-CAFE Date 25 February 2010, 19:46 Source FPGA-CAFE Author Yuichiro C. Katsumoto from Shonan, Japan...

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File:SHORT-TERM SELF-MOVING TACTICAL NETWORKS IN AUSTERE ENVIRONMENTS (IA shorttermselfmov1094562794).pdf
Minggu, 2024-08-18 15:14:17

of SDRs are the Field-Programmable Gate Array (FPGA) and the A/D converter (Jacobsmeyer, 2012). FPGA is a semiconductor device that performs following...

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File:Stereo image correspondence methods for efficient hardware implementation (IA stereoimagecorre109455335).pdf
Senin, 2026-04-06 08:45:57

prototyping and hardware implementation is the field programmable gate array (FPGA). FPGAs are a “blank slate” integrated circuit that can be configured with a...

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File:Computing the Algebraic Immunity of Boolean Functions on the SRC-6 Reconfigurable Computer (IA computingalgebra109456831).pdf
Selasa, 2024-08-20 16:59:17

Boolean Functions; Transeunt Triangle; Reconfigurable Computing; SRC-6; FPGA; Verilog; Algebraic Attack Language English Publication date March 2012 Current...

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File:Password-Hashing Status.pdf
Jumat, 2025-12-12 06:11:28

[11] enables computational feasible cracking [12,13]. Attacks on ASICs, FPGAs, and GPUs are now benefited with a significant boost in disclosing the user...

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File:Torque control of a separate excitation DC motor for a dynamometer (IA torquecontrolofs109455011).pdf
Sabtu, 2026-01-24 00:11:49

converted to control armature current through a Field Programmable Gate Array (FPGA) to the DC motor. The armature current level is maintained through a programmed...

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File:Optimizing gas generator efficiency in a forward operating base using an energy management system (IA optimizinggasgen1094534686).pdf
Minggu, 2024-08-18 00:45:06

communicates with the FPGA through a universal serial bus (USB) port and an interface chip. The Simulink code was loaded from the PC onto the FPGA using Xilinx’s...

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File:High-speed numeric function generator using quadratic approximations (IA highspeednumeric109453276).pdf
Selasa, 2024-08-20 17:01:19

Generator, Piecewise Quadratic Approximation, Field Programmable Gate Array (FPGA), Reconfigurable Computer, VHSIC Hardware Description Language, Computer...

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File:Workshop on IEEE-1588, standard for a precision clock synchronization protocol for networked measurement and control systems (IA workshoponieee157070leek).pdf
Sabtu, 2025-10-04 22:57:30

example, for a Field Programmable Gate Array (FPGA) core, or for a source code for the protocol stack. (ASIC)/FPGA It was noted that Application Specific...

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File:Doubly fed induction machine control for wind energy conversion (IA doublyfedinducti109454696).pdf
Minggu, 2026-05-10 18:33:55

Space Vector Modulation (SVM), Wind Turbine, Field Programmable Gate Array (FPGA), Wind Energy Conversion System 17. SECURITY CLASSIFICATION OF REPORT Unclassified...

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File:Vsis exercises.pdf
Selasa, 2020-12-08 15:55:23

server (There is a batch file for the CVS string under D:\xxx) 3. Connect the FPGA board to the PC and the power supply 4. Perform the build as described in...

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File:Wirelessly networked digital phased array design and analysis of A 2.4 GHZ demonstrator (IA wirelesslynetwor109452685).pdf
Kamis, 2025-09-04 07:56:42

consisting of T/R modules realized using field programmable gate array (FPGA) technology are developed. The demonstration units are frequency scaled from...

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File:Neural network design on the SRC-6 reconfigurable computer (IA neuralnetworkdes109452396).pdf
Minggu, 2024-08-18 06:59:26

ACRONYMS, AND/OR ABBREVIATIONS ANN ASCII ASIC BRAM DARPA DEL DLD DSP EA EM FPGA GPIO LPI LUT MLP MRI NPS OBM QMFB RAM RANN RMS USMC USNR VHDL VHSIC XOR ...

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File:FPGA MPU STM32.png
Rabu, 2026-03-18 02:33:57

DescriptionFPGA MPU STM32.png Français : Schéma de principe reliant accéléromètre, STM32 et MOJO Date 16 June 2018 Source Own work Author SergeMoutou...

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File:Designing fast Golay encoder-decoder in Xilinx XACT with Mentor Graphics CAD interface (IA designingfastgol00sari).pdf
Sabtu, 2025-08-02 03:36:17

Coding, is implemented in Xilinx XC4000 family programmable gate array (FPGA) architecture. The encoder/decoder is designed using the Xilinx XACT tool...

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File:FPGA cell example.png
Selasa, 2024-08-06 14:27:57

DescriptionFPGA cell example.png English: An example of how an FPGA logic cell can look like, incl a 4 inp. LUT (or two 3-LUTs), a Full Adder and a D-type...

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File:DETECTING RANSOMWARE THROUGH POWER ANALYSIS (IA detectingransomw1094559721).pdf
Sabtu, 2024-08-17 04:03:21

arrays (FPGAs) was possible through power analysis techniques. In the experiment, encryption of plain text was performed while the power of the FPGA was recorded...

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File:Benchmarking and analysis of the SRC-6E reconfigurable computing system (IA benchmarkingndna109456170).pdf
Rabu, 2024-08-28 02:54:28

appendices. 14. SUBJECT TERMS Benchmark, Reconfigurable Computing, VHDL, SRC-6E, FPGA, False Radar Target Synthesis 15. NUMBER OF PAGES 149 16. PRICE CODE 17...

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File:Patent notice.pdf
Minggu, 2024-08-18 01:47:32

European Patent No(s).: 1004072; 1004085 LabVIEW FPGA Software/Hardware (includes CompactRIO) The LabVIEW FPGA software and hardware is covered by one or more...

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File:MCTX3420 Group 2 Final Report.pdf
Sabtu, 2025-04-19 07:21:20

control variable(s) in order to obtain some desired control system. The cRIO FPGA device may be programmed with a master VI. This master VI will make available...

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File:USENIX '05 Security Symposium Proceedings.djvu
Jumat, 2025-09-26 00:45:41

an FPGA for computing the well known time-space tradeoff of Hellman [12]. Although we pre-compute the underlying look-up tables using the FPGA (Field-...

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File:Cpu fpga ger.jpg
Senin, 2024-10-14 19:38:18

DescriptionCpu fpga ger.jpg Deutsch: intnernal communication Date 29 September 2011 Source Own work Author Wiki qbloxx...

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File:Fpga structure.svg
Selasa, 2024-08-20 08:28:24

DescriptionFpga structure.svg Structure of an FPGA Date 22 February 2006 (original upload date) Source No machine-readable source provided. Own work assumed...

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File:6-axis incremental encoder interface.jpg
Kamis, 2023-06-01 19:19:34

Alike 4.0 truetrue 1195 609 586 577 1899 1476 Field programmable gate array (FPGA) which contains 6 axis processors. Each processor has input noise filters...

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File:Mojo v3 FPGA Development Board (9303578174).jpg
Minggu, 2024-09-22 22:14:36

DescriptionMojo v3 FPGA Development Board (9303578174).jpg <a href="https://www.sparkfun.com/products/11953" rel="noreferrer nofollow">www.sparkfun...

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File:ZX81 Leiterkarte.jpg
Sabtu, 2026-02-21 16:58:10

demontiert) / Heatsink (removed in this picture) 844 883 230 484 2212 1660 ROM 587 235 246 681 2212 1660 „ULA2C184E“ FPGA (Uncommitted Logic Array) English...

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File:Development of the phase synchronization circuit for wirelessly distributed digital phased array (IA developmentofpha109454611).pdf
Sabtu, 2026-04-25 20:37:18

Concept ........................................28 2. Previous NI LabVIEW FPGA ..........................................................30 3. New Module...

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File:Discovery of bent functions using the Fast Walsh Transform (IA discoveryofbentf109455080).pdf
Jumat, 2026-05-01 09:20:17

SUBJECT TERMS Bent Functions, Cryptography, Field Programmable Gate Array (FPGA), Reconfigurable Computer, Fast Walsh Transform. 17. SECURITY CLASSIFICATION...

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File:FPGA internals.PNG
Sabtu, 2024-07-13 02:19:01

DescriptionFPGA internals.PNG English: Color coded to show where compiler placed my modules. DAC - Purple Main module - Crimson Block Memory (ROM) - Khaki...

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File:Fpga.xcf
Kamis, 2025-11-13 17:14:18

DescriptionFpga.xcf English: decision tree example .. choosing which fpga technology to use Date 17 November 2012, 11:36:18 Source Own work Author 1sfoerster...

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File:Fpga.JPG
Kamis, 2022-06-09 20:02:55

DescriptionFpga.JPG Français : Classement des FPGA Date 16 December 2010 Source Own work Author Bassime...

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File:Integration and control of a battery balancing system (IA integrationndcon1094538989).pdf
Minggu, 2025-06-22 23:45:14

PCB Functionality A/D converters Xilinx Virtex 4 FPGA Board Sensors 4 currents 4 voltages FPGA/USB Interface chip USB connector 8 pin TTL interface...

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File:Evaluation and testing of the Naval Postgraduate School Satellite (NPSAT1) Solar Cell Measurement System (IA evaluationndtest109451388).pdf
Selasa, 2025-05-06 16:38:00

consists of a radiation-hardened microcontroller that uses a radiation-hardened FPGA to monitor a collection of sensors. A current-sink circuit is used to measure...

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File:Wireless networks for beamforming in distributed phased array radar (IA wirelessnetworks109453306).pdf
Senin, 2025-03-03 19:47:50

..............39 LabVIEW FPGA architecture (From [31])......................................................40 LabVIEW FPGA model (After [31])..........

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File:Modeling and implementing a digitally embedded maximum power point tracking algorithm and a series-loaded resonant DC-DC converter to integrate a photovoltaic array with a micro-grid (IA modelingndimplem1094543870).pdf
Minggu, 2024-08-18 19:34:33

the Virtex-4 field programmable gate array (FPGA) and the two PCBs is shown in Figure 11. 18 Virtex-4 FPGA and development board PCB 1 PCB 2 Figure...

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File:FPGA Re-encrption Proxy.jpg
Senin, 2026-01-05 05:14:01

DescriptionFPGA Re-encrption Proxy.jpg Français : Fonctionnement Re-encryption Proxy avec un cloud FPGA Date 30 December 2020 Source Own work Author Vincent...

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File:Fpga xilinx spartan.jpg
Sabtu, 2026-04-25 11:09:02

DescriptionFpga xilinx spartan.jpg Xilinx FPGA (Spartan XC3S400). The FPGA has 400000 gates, runs at 50 Mhz. See for specs. The picture is a close-up...

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File:SOFTWARE-DEFINED RADIO PAYLOAD DESIGN FOR CUBESAT AND X-BAND COMMUNICATIONS (IA softwaredefinedr1094561218).pdf
Senin, 2022-01-17 11:32:04

152]. The digital signal processor (DSP) for the Ettus B205mini-i is a FPGA. The FPGA drives the desired signal processing algorithms using “an array of configurable...

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File:Placa fpga usb2.jpg
Minggu, 2024-05-19 19:55:21

DescriptionPlaca fpga usb2.jpg Español: Tarjeta de desarrollo FPGA-USB2.0 Date 8 March 2006 Source Own work Author CamiloQuintans...

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File:ALTERA DE2 FPGA Board.jpg
Selasa, 2023-06-20 09:29:42

DescriptionALTERA DE2 FPGA Board.jpg English: Altera DE2 FPGA board. Português: Placa FPGA ALTERA DE2. Source Own work Author Thotypous (Paulo Matias)...

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File:Report on the development of the Advanced Encryption Standard (AES) (IA jresv106n3p511).pdf
Selasa, 2025-12-09 07:18:39

Comparison of the Finalists . . . . . . . . . . . . . 3.5.3.6 Overall Summary of FPGA Implementations . . . . . . . . 512 520 520 520 522 522 523 523 523 523...

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File:Reactive power compensation using an energy management system (IA reactivepowercom1094543982).pdf
Minggu, 2024-08-18 15:02:47

Xilinx System Generator software [12], which is used by the FPGA to command the EMS. The FPGA development board is the middle board shown in Figure 5. The...

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File:Olimex Teres I Manual v. 1.5.pdf
Minggu, 2025-04-20 01:38:39

few basic programs – Internet browser, Open Office, Arduino IDE, IceStorm FPGA Verilog tools, a video player, etc. You can, of course, install additional...

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File:TP2 exo2b.png
Kamis, 2022-06-09 16:18:11

Alike 4.0 truetrue English French Gestion d'un afficheur 7 segments par un FPGA URL: https://commons.wikimedia.org/wiki/user:SergeMoutou author name string:...

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File:Maximum power point tracking of a photovoltaic system utilizing an interleaved boost converter (IA maximumpowerpoin1094547339).pdf
Senin, 2025-10-06 06:36:30

...........................................................73 A. XILINX FPGA ...........................................................................

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File:Simulating and testing a DC-DC half-bridge SLR converter (IA simulatingndtest1094534721).pdf
Sabtu, 2026-03-07 21:01:05

BUILDING THE PRINTED CIRCUIT BOARD .......................................30 FPGA CONTROLLER ................................................................

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File:IMPLEMENTATION OF PHYSICAL LAYER SECURITY FOR MULTIPLE-INPUT, MULTIPLE-OUTPUT COMMUNICATIONS VIA A WAVELET PACKET MODULATED SOFTWARE-DEFINED RADIO SYSTEM WITH NOISE MASKING (IA implementationof1094564039).pdf
Senin, 2024-08-26 05:29:56

..........................19 Figure 9. SDR receiver implemented on an FPGA with GNU Radio code. Adapted from [18].....................................

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File:Digilent Pmod.png
Rabu, 2026-04-29 18:36:31

0 truetrue English French Connecteur spécifique des cartes de Digilent (FPGA et Microcontrôleurs) author name string: SergeMoutou Wikimedia username:...

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File:The NPS Small Robotic Technology Initiative, man-portable robots for low intensity conflict (IA thenpssmallrobot1094534057).pdf
Minggu, 2024-08-18 00:21:08

Robotics; Autonomous; Micro-Controller; Embedded; Processor; Diffential; GPS; FPGA; ipEngine; Man-portable Language English Publication date June 2001 Current...

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File:Synthetic space vector modulation (IA syntheticspaceve1094534731).pdf
Rabu, 2026-03-04 19:55:25

DoD DSP Direct Current Department of Defense Digital Signal Processer FPGA Field Programmable Gate Array Mod-6 Mod-12 Mux Modulo-6 Modulo-12 Multiplexer...

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File:FPGA cells-in-block example.png
Jumat, 2020-10-09 00:33:44

DescriptionFPGA cells-in-block example.png English: An example of how logic cells can be connected within a logic block in an FPGA. Svenska: Ett exempel...

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File:Hysteresis control of parallel-connected hybrid inverters (IA hysteresiscontro109452010).pdf
Minggu, 2024-08-18 17:45:33

use of an FPGA more easily. The conversion to the stationary dq0reference frame would provide a more responsive and robust controller. The FPGA construct...

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File:Development of a Distributed Digital Array Radar (DDAR) (IA developmentofdis109454000).pdf
Sabtu, 2026-04-25 20:29:32

..................................................................69 6. FPGA Function ..................................................................

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File:Gauron - Données ouvertes, logiciel libre.pdf
Kamis, 2026-04-09 23:27:09

Application-Specific Integrated Circuit (ASIC), Field-Programmable Gate Array (FPGA), Complex Programmable Logic Device (CPLD), System-onChip (SoC), PCB (Printed...

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File:ZXspectrum mb.jpg
Jumat, 2024-12-13 04:26:07

154 2048 1222 Netzteilanschluss Spannungseingang 653 377 174 459 2048 1222 FPGA (Uncommitted Logic Array) 84 907 760 195 2048 1222 RAM 1541 174 151 336 2048...

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File:PEAK POWER CONTROL WITH AN ENERGY MANAGEMENT SYSTEM (IA peakpowercontrol1094532884).pdf
Selasa, 2025-12-16 03:21:57

diagram. ...............................................................25 The FPGA based EMS electronics. ....................................................

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File:Automated digital hardware synthesis using VHDL (IA automateddigital1094534999).pdf
Minggu, 2024-08-18 16:15:26

description is then directly implemented into a field programmable gate array (FPGA) using the XILINX Logic Cell Array (LCA) development system. Complete examples...

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File:Seventh International Conference on Computer Technology in Welding (IA seventhinternati923siew).pdf
Minggu, 2024-08-18 00:25:56

PROCESSING DSP in PROCESSOR FPGA - the Future (now) Field -> FPGA (future)"! Programable Gate Array WHAT ARE FPGAs? * Large Collection of Logic...

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File:Design and implementation of an active calibration system for weather radars (IA designndimplemen109453977).pdf
Sabtu, 2024-11-30 13:36:35

..............135 fpgaRX_test_CODE ......................................................................................135 fpgaRX_test_UI ...........

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File:Altera-cyclone-1-fpga-Si-HD.jpg
Kamis, 2024-08-15 20:12:45

DescriptionAltera-cyclone-1-fpga-Si-HD.jpg English: The Altera Cyclone EP1C3 is the smallest 1st generation FPGA from Altera. It has 2910 LE, 1 PLL and...

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File:Stéganographie avec FPGA.jpg
Kamis, 2025-12-04 04:09:54

DescriptionStéganographie avec FPGA.jpg Français : génération d'une image stéganographie avec FPGA Date 9 January 2014, 11:59:02 Source Own work Author...

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File:Architecture FPGA.JPG
Selasa, 2023-09-12 12:56:17

DescriptionArchitecture FPGA.JPG Français : Architecture FPGA Source Own work Author Bassime...

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File:Active vibration control of flexible structures using the Modular Control Patch (MCP) (IA activevibrationc00schm).pdf
Minggu, 2024-08-18 17:02:20

mainly for laboratory building block for a space qualified model. A (FPGA). test purposes in order to be a subsequent model, the MCP-IV, was produced...

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File:RedPitaya STEMLab FPGA v1.1 backview.jpg
Kamis, 2026-03-19 02:14:58

DescriptionRedPitaya STEMLab FPGA v1.1 backview.jpg English: RedPitaya STEMLab FPGA PCB assembly v1.1, back view Date 5 July 2019 Source Own work Author...

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File:F7 Summary of Spartan-3E FPGA Attributes.png
Jumat, 2020-09-11 21:02:37

DescriptionF7 Summary of Spartan-3E FPGA Attributes.png Русский: Основні характеристики Spartan 3E Date 31 January 2018 Source Own work Author Vorobev...

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File:Fpga connected to screen with VGA cable.jpg
Minggu, 2026-04-05 03:19:17

DescriptionFpga connected to screen with VGA cable.jpg English: xilinx spartan 3E papillio 250 connected to screen with VGA cable Date 11 December 2014...

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File:Archi-FPGA.JPG
Selasa, 2023-09-12 08:39:35

DescriptionArchi-FPGA.JPG Français : Architecture des FPGAs Date 13 December 2010 Source Own work Author Bassime...

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File:Xilinx XC3S50 Spartan 3 FPGA (5339822172).jpg
Rabu, 2025-11-12 19:10:27

DescriptionXilinx XC3S50 Spartan 3 FPGA (5339822172).jpg This is a Xilinx Spartan 3 FPGA, officially known as the XC3S50. This stitch has some exposure...

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File:RedPitaya STEMLab FPGA v1.1 topview.jpg
Sabtu, 2025-10-04 03:14:48

DescriptionRedPitaya STEMLab FPGA v1.1 topview.jpg English: RedPitaya STEMLab FPGA PCB assembly v1.1, top view Date 5 July 2019 Source Own work Author...

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File:Reconfiguration FPGA.JPG
Minggu, 2025-08-17 11:31:32

DescriptionReconfiguration FPGA.JPG English: Reconfiguration of FPGA Français : Reconfiguration du FPGA Date 16 December 2010 Source Own work Author Bassime...

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File:Icezum Alhambra Open FPGA electronic board.png
Rabu, 2025-12-10 20:03:43

DescriptionIcezum Alhambra Open FPGA electronic board.png English: Icezum Alhambra Open FPGA electronic board Date 18 May 2016 Source https://github...

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File:Emulation of Wind Power with a DC Machine to Provide Input to a Doubly-Fed Induction Machine (IA emulationofwindp109456808).pdf
Minggu, 2024-08-18 18:42:55

Xilinx XC4VLX25 FPGA Custom interface card (A/D converters and digital I/O A+ A- Oscilloscope ch3 ch2 ch1 Xilinx XC4VLX25 FPGA Run/stop Custom...

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File:SMALL SATELLITE SENSOR AND PROCESSING ANALYSIS FOR MARITIME DOMAIN AWARENESS (IA smallsatellitese1094559719).pdf
Minggu, 2024-08-18 12:29:16

..................................................................21 C. FPGA TECHNOLOGY IN SOFTWARE-DEFINED RADIOS FOR SMALLSATS .......................

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File:FPGA chip die (Xilinx XC4010-6) (22054207552).jpg
Sabtu, 2024-08-17 18:34:20

DescriptionFPGA chip die (Xilinx XC4010-6) (22054207552).jpg FPGA chip die (Xilinx XC4010-6) Date 9 October 2015, 16:45 Source FPGA chip die (Xilinx XC4010-6)...

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File:RedPitaya STEMLab FPGA v1.1 frontview.jpg
Sabtu, 2022-02-26 21:23:40

DescriptionRedPitaya STEMLab FPGA v1.1 frontview.jpg English: RedPitaya STEMLab FPGA PCB assembly v1.1, front view Date 5 July 2019 Source Own work Author...

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File:Lancelot-A FPGA based bitcoin mining board.jpg
Jumat, 2022-01-28 03:59:29

DescriptionLancelot-A FPGA based bitcoin mining board.jpg English: Lancelot-A FPGA based bitcoin mining board Date 1 August 2013 Source Sent to me personally...

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File:Analog Four - FPGA and Audio Codec (8419086808).jpg
Senin, 2025-09-22 22:56:35

DescriptionAnalog Four - FPGA and Audio Codec (8419086808).jpg Inside the Electron Analog Four 4 voice analog synthesizer. There's a Xilinx Spartan FPGA at the bottom...

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File:Thin Layer Breadstick FPGA Dev Board.jpg
Kamis, 2022-06-09 16:03:22

DescriptionThin Layer Breadstick FPGA Dev Board.jpg English: Breadstick is an FPGA Dev board for Breadboarding use. It contains a module with an Altera...

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File:Meteorological measurements with a MWR-05XP phased array radar (IA meteorologicalme109452255).pdf
Rabu, 2024-08-21 06:36:34

Picture COHO Coherent Oscillator DOW Doppler On Wheels EL Elevation FPGA Field Programmable Gated Array GPS Global Positioning System GUI Graphical...

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File:Fr-Paris--FPGA.ogg
Sabtu, 2020-09-12 03:52:33

DescriptionFr-Paris--FPGA.ogg French pronunciation of « FPGA » Source Own work Author Jjackoti...

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File:Schéma copresseur CPU-FPGA.jpg
Senin, 2026-04-20 10:44:03

DescriptionSchéma copresseur CPU-FPGA.jpg Français : Schéma copresseur CPU-FPGA connecté au réseau cloud Date 1 January 2021 Source Own work Author Ajustand...

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File:Modeling and demonstrating regenerative braking of a squirrel cage induction motor with various deceleration rates using V by F control (IA modelingnddemons109455259).pdf
Rabu, 2024-08-21 17:55:43

the computer code language for the Field Programmable Gate Array (FPGA). The FPGA controlled the output of a power inverter capable of Space Vector Modulation...

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File:A 3-channel 14-bit optimum SNS wideband digital antenna - analysis of the electro-optic sampling front end (IA 3channel14bitopt00fost).pdf
Minggu, 2024-08-18 19:54:17

Symmetrical Number 253 comparators, and a Field Programmable Gate Array (FPGA) device to achieve 14-bit accuracy. Antenna Circulators V Reflective...

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File:Thin Layer Embedded Goldilocks FPGA Development Board.jpg
Kamis, 2022-06-09 16:03:26

Goldilocks FPGA Development Board.jpg English: Goldilocks is an FPGA Development Board with three Arduino UNO Shield sockets. It carries a 'helix_4' FPGA module...

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File:Schéma Classification virtualisation FPGA.jpg
Rabu, 2026-04-22 06:38:02

DescriptionSchéma Classification virtualisation FPGA.jpg Français : Schéma Classification des techniques de virtualisation FPGA et de leurs équivalents sur la virtualisation...

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File:Technical and operational analysis of the fortress secure wireless access bridge (ES-520) in support of tactical military coalition operations (IA technicalndopera109454265).pdf
Minggu, 2024-08-18 22:48:42

FHL Fort Hunter Ligget FIPS Federal Information Processing Standards FPGA Field Programmable Gate Array xiii and Applied Science & FSO Free...

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File:OpenRISC prototyped on Flextronics FPGA dev board. Running uClinux.jpg
Sabtu, 2026-05-16 07:30:22

DescriptionOpenRISC prototyped on Flextronics FPGA dev board. Running uClinux.jpg English: OpenRISC prototyped on a Flextronics FPGA dev board. It shows running uClinux...

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File:Characterization, optimization, and test of the NPSATI MEMS 3-axis sensor suite for use in small satellite attitude control (IA characterization109453246).pdf
Senin, 2024-08-19 01:00:21

AOCS BIT C&DH CERTO CFTP COBRAS COTS EDU EELV EPS ESA ESPA EVA FIRST FFT FPGA IC ITAR ITJ LDO LEO MEMS MPE NPS NPSAT1 NRL PPD PCFB PRCB RMU SAFER SDI SKLPBF...

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File:Schema virtualisation FPGA.jpg
Minggu, 2026-05-10 03:51:32

DescriptionSchema virtualisation FPGA.jpg Français : Schema virtualisation FPGA Date 6 January 2021 Source Own work Author JawedM2CC...

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File:Software Communications Architecture (SCA) compliant software radio design for Interim Standard 95B (IS-95B) transceiver (IA softwarecommunic109453680).pdf
Minggu, 2024-08-18 12:38:58

using digital signal processors (DSPs), field programmable gate arrays (FPGAs), or application specific integrated circuits (ASICs) [2]. For this thesis...

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File:Software Communications Architecture (SCA) compliant software defined radio design for IEEE 802.16 wirelessman-OFDMtm transceiver (IA softwarecommunic109452459).pdf
Minggu, 2024-08-18 12:09:09

ABBREVIATIONS ADC ADSL ASIC BWA BS CORBA COTS CF CP DAC DL DSP FDD FEC FFT FPGA IDL IF IFFT JTRS LNA LO MAC MP-MP NLOS OE OMG ORB OSSIE OWD PMP PRBS RF RS...

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File:Altera StratixIVGX FPGA.jpg
Selasa, 2025-08-19 02:06:12

DescriptionAltera StratixIVGX FPGA.jpg English: Altera Stratix IV EP4SGX230 FPGA on a PCB Date 2 February 2009 Source Altera Corporation Author Altera...

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File:INSECT-INSPIRED MINIATURE AIR VEHICLE OBSTACLE DETECTION (IA insectinspiredmi1094563452).pdf
Minggu, 2024-08-18 12:57:19

Lightweight Autonomy FOC Focus of contraction FOE Focus of expansion FPGA Field programmable gate array HA/DR Humanitarian Assistance and Disaster...

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File:OJ L 202401338 of 2024 - HR Croatian.pdf
Sabtu, 2025-11-08 07:08:00

KN Integrirani sklopovi kako slijedi: Programirljivi logički sklopovi (FPGA), mikroupravljači, ex 8542 31 mikroprocesori, procesori signala, analizatori...

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File:Xilinx XC3090-70 FPGA.jpg
Kamis, 2022-06-09 15:17:28

DescriptionXilinx XC3090-70 FPGA.jpg Français : FPGA Xilinx XC3090-70 - Boitier PGA 175 pins English: FPGA Xilinx XC3090-70 - 175-pin PGA package Date...

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File:(H.A.S.C. No. 114-63) ASSESSING DOD'S ASSURED ACCESS TO MICROELECTRONICS IN SUPPORT OF U.S. NATIONAL SECURITY REQUIREMENTS (IA gov.gpo.fdsys.CHRG-114hhrg97497).pdf
Minggu, 2024-08-18 14:46:37

the performance exhibited in commercial FPGAs, an industry that is pushing state of the art. Basically the FPGA manufacturers are pushing state of the...

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File:OJ L 202401338 of 2024 - PT Portuguese.pdf
Minggu, 2026-05-31 14:35:55

Circuitos integrados, como se segue: matrizes de portas de campo programáveis (FPGA), ex 8542 31 microcontroladores, microprocessadores, processadores de sinais...

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File:Photo d'une carte FPGA.jpg
Jumat, 2026-03-27 10:26:47

DescriptionPhoto d'une carte FPGA.jpg Français : Photo d'une carte FPGA manufacturée. Date 2 January 2021 Source "A Reconfigurable Fabric for Accelerating...

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File:Altera CYCLONE II FPGA.jpg
Jumat, 2025-11-14 02:21:24

DescriptionAltera CYCLONE II FPGA.jpg English: Altera Cyclone II FPGA Date 1 April 2010 Source I Reubentg created this work entirely by myself. Author...

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File:Xilinx Virtex 4 XCE04L4 FPGA (EasyPath).jpg
Rabu, 2026-04-08 08:24:20

DescriptionXilinx Virtex 4 XCE04L4 FPGA (EasyPath).jpg English: Source: Cisco WS-X6708-10G-3C switch module Die size: 11.4mm x 13.6mm = 155mm² 2 of these...

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File:OJ L 202401338 of 2024 - SK Slovak.pdf
Minggu, 2026-05-31 14:36:25

znak KN Integrované obvody: hradlové pole programovateľné u zákazníka (FPGA), mikroovládače, ex 8542 31 mikroprocesory, signálne procesory, analyzátory...

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File:OJ L 202401338 of 2024 - FI Finnish.pdf
Minggu, 2026-05-31 14:33:20

Kuvaus CN-koodi Seuraavat integroidut piirit: Ohjelmoitava porttimatriisi (FPGA), mikro-ohjaimet, mikro­ ex 8542 31 prosessorit, signaaliprosessorit,...

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File:Xilinx Virtex 4 XCE04L10 FPGA (EasyPath).jpg
Minggu, 2026-04-05 10:52:08

DescriptionXilinx Virtex 4 XCE04L10 FPGA (EasyPath).jpg English: Source: Cisco WS-X6708-10G-3C switch module Die size : 20.5mm x 16.0mm = 328mm² 2 of these...

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File:Attila Instant-DevKit ARRIA 10 FPGA FMC IDK (19859785568).jpg
Sabtu, 2025-08-09 01:51:59

DescriptionAttila Instant-DevKit ARRIA 10 FPGA FMC IDK (19859785568).jpg <a href="https://www.reflexces.com/products/development-kits/arria-10-instant-devkit/attila"...

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File:Power analysis of an Enterprise Wireless Communication architecture (IA powernalysisofne1094556124).pdf
Minggu, 2024-08-18 19:07:51

in Field Programmable Gate Arrays (FPGA) has reached 10s of gigabits per second, and the industry leaders in FPGA systems have also announced one terabit...

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File:알테라 사이클론2 FPGA.jpg
Sabtu, 2024-08-17 18:07:28

Description알테라 사이클론2 FPGA.jpg 알테라 사이클론2 FPGA Date 19 January 2007 Source ko:User:Hoenny Author ko:User:Hoenny Permission (Reusing this file) GFDL...

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File:FEDLINK - United States Federal Collection (IA amethodfortestin109455269).pdf
Sabtu, 2025-03-08 22:46:10

.................................................48 C. COMPACT RIO WITH FPGA ....................................................................49 1...

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File:LL-Q150 (fra)-Poslovitch-FPGA.wav
Sabtu, 2023-04-29 02:57:48

(fra)-Poslovitch-FPGA.wav Audio pronunciation file from the Lingua Libre project. Language InfoField French Transcription InfoField FPGA Date 4 October...

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File:Power losses and thermal modeling of a voltage source inverter (IA powerlossesndrma109452979).pdf
Senin, 2026-05-18 21:18:12

AND SYMBOLS VSI Voltage Source Inverter ONR Office of Naval Research FPGA Field Programmable Gate Array NPS Naval Postgraduate School LOCC Loss...

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File:OJ L 202401338 of 2024 - RO Romanian.pdf
Minggu, 2026-05-31 14:36:09

programabile de către utilizator ex 8542 31 (Field Programmable Gate Array – FPGA), microcontrolere, microprocesoare, procesoare de semnal, analizoare de semnal...

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File:OJ L 202401338 of 2024 - PL Polish.pdf
Kamis, 2026-04-09 08:23:07

Następujące układy scalone: bezpośrednio programowalna macierz bramek (FPGA), ex 8542 31 mikrokontrolery, mikroprocesory, procesory sygnałów, analizatory...

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File:Digital semaphore- technical feasibility of QR code optical signaling for fleet communications (IA digitalsemaphore1094534699).pdf
Rabu, 2026-04-29 19:39:51

EMCON Emissions Control FEC Forward Error Correction FOV Field of View FPGA Field Programmable Gate Array FPS Frames per Second HERO Hazards of...

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File:MIMO-FE-as-implemented-on-an-FPGA-case-size-is-28--22--5cm.jpg
Minggu, 2026-05-31 09:48:01

DescriptionMIMO-FE-as-implemented-on-an-FPGA-case-size-is-28--22--5cm.jpg English: MIMO-FE as implemented on an FPGA (case size is 28 × 22 × 5 cm). Date 13...

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File:Agilex-5-fpga-e-series-065b-modular-board-wht-bg.png
Senin, 2026-04-13 19:31:42

DescriptionAgilex-5-fpga-e-series-065b-modular-board-wht-bg.png English: photo of Agilex 5 FPGA E-series 065B Modular Board Date 15 May 2024 Source Own...

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File:Attila Instant-DevKit ARRIA 10 FPGA FMC IDK (19859855560).jpg
Rabu, 2024-10-23 13:03:56

DescriptionAttila Instant-DevKit ARRIA 10 FPGA FMC IDK (19859855560).jpg <a href="https://www.reflexces.com/products/development-kits/arria-10-instant-devkit/attila"...

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File:LstmFPGA.jpg
Minggu, 2022-03-27 11:25:55

DescriptionLstmFPGA.jpg Français : Implémentation LSTM sur Cloud FPGA Date 16 December 2020 Source Own work Author Vincent Raynaud...

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File:OJ L 202401338 of 2024 - BG Bulgarian.pdf
Minggu, 2026-05-31 14:40:34

следва: комбинационен логически елемент със зони за ex 8542 31 програмиране (FPGA), микроконтролери, микропроцесори, сигнални процесори, сигнални анализатори...

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File:№ 2009613544 от 02.07.2009– Программа для ЭВМ «Sun Jet FPGA».jpg
Rabu, 2025-01-08 20:58:40

Description№ 2009613544 от 02.07.2009– Программа для ЭВМ «Sun Jet FPGA».jpg English: Information about the objects of intellectual property Date 30 January...

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File:Schéma Classification technique de virtualisation FPGA.jpg
Rabu, 2026-04-22 06:38:21

Classification technique de virtualisation FPGA.jpg Français : Schéma Classification des techniques de virtualisation FPGA. Date 5 January 2021 Source Own work...

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File:Embedded World 2014 Enclustra FPGA.jpg
Jumat, 2026-03-13 07:26:05

DescriptionEmbedded World 2014 Enclustra FPGA.jpg Deutsch: Embedded World 2014: Werbeteppich des FPGA-Herstellers Enclustra Date 27 February 2014 Source...

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File:ELINT signal processing using Choi-Williams distribution on reconfigurable computers for detection and classification of LPI emitters (IA elintsignalproce109454156).pdf
Selasa, 2026-05-26 19:52:15

FFT Fast Fourier Transform FMCW Frequency Modulated Continuous Wave FPGA Field Programmable Gate Arrays I In Phase Portion of Data LPI Low Probability...

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File:OJ L 202401338 of 2024 - LV Latvian.pdf
Minggu, 2026-05-31 14:34:59

kods Šādas integrālshēmas: darbības vidē programmējamu elementu kopnes (FPGA); mikro­ ex 8542 31 kontrolleri, mikroprocesori, signālu procesori, signālu...

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File:OJ L 202401338 of 2024 - MT Maltese.pdf
Minggu, 2026-05-31 14:35:14

Ċirkwiti integrati, kif ġej: Matriċi ta’ Gates Programmabbli mill-Utent (FPGA), mikrokon­ eks 8542 31 trolluri, mikroproċessuri, proċessuri tas-sinjali...

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File:MAV SRC IEEE 2022.pdf
Sabtu, 2024-08-17 19:12:44

consists of a pyro-activated thermal battery, a FieldProgrammable Gate Array (FPGA) firmware-operated controller, and two traditional electromechanical actuators...

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File:A software assurance framework for mitigating the risks of malicious software in embedded systems used in aircraft (IA asoftwaressuranc109455593).pdf
Sabtu, 2024-08-17 03:26:07

B.S. Bi BSS CAS CD CIA CM CNC CPU CSC CSCI CSU CVE DAL DC DRAM EEC FADEC FPGA GCC GNU GSN GSN I/O IC IDD IP JPEG MC/DC MMU Aircraft Air Data Inertial...

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File:LL-Q150 (fra)-LoquaxFR-FPGA.wav
Sabtu, 2023-04-29 02:55:20

(fra)-LoquaxFR-FPGA.wav Audio pronunciation file from the Lingua Libre project. Language InfoField French Transcription InfoField FPGA Date 5 January...

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File:OJ L 202401338 of 2024 - GA Irish Gaelic.pdf
Minggu, 2026-05-31 14:33:49

Ciorcaid iomlánaithe, mar a leanas: Eagar Geataí In-Ríomhchláraithe sa Réimse (FPGA), ex 8542.31 micririaltáin, micreaphróiseálaithe, próiseálaithe comharthaí...

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File:NPSAT1 MEMS 3-Axis rate sensor suite performance, characterization, and flight unit acceptance testing (IA npsatmemsaxisrat109455490).pdf
Minggu, 2024-08-18 06:18:46

EPS Electrical Power Subsystem ESPA EELV Secondary Payload Adapter FPGA Field Programmable Gate Array GEVS General Environmental Verification...

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File:Canadian Hydrogen Intensity Mapping Experiment - antennas.jpg
Senin, 2025-11-10 02:54:35

Reference Repeating Fast Radio Bursts Ring Canada’s CHIME - FPGAs, GPUs, and CPUs Sift Through the Universe’s Electromagnetic Spectrum to Make the Discovery...

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File:Altera Flex EPF10K20 20000 cell FPGA.jpg
Jumat, 2025-07-04 23:00:05

DescriptionAltera Flex EPF10K20 20000 cell FPGA.jpg This is a an Altera Flex FPGA with 20,000 cells (a fairly old part). The device photographed is on...

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File:Coherent noise rejection in a three-phase power inverter (IA coherentnoiserej109455630).pdf
Minggu, 2024-08-18 21:09:57

into the possibility of implementation on a Field Programmable Gate Array (FPGA) for real-time applications to a power inverter. xiii The simulations provided...

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File:Isolated word recognition from in-ear microphone data using Hidden Markov Models (HMM) (IA isolatedwordreco109452924).pdf
Jumat, 2024-08-16 03:09:18

Expectation-Maximization FFT Fast Fourier Transform FIR Finite Impulse Response FPGA Field-Programmable Gate Array FTE Frame-Based Teager Energy HMM Hidden...

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File:Towards a low-cost quadrotor research platform (IA towardslowcostqu1094510540).pdf
Selasa, 2026-04-14 06:47:57

Spread Spectrum FFT Fast Fourier Transform FIR Finite Infinite Response FPGA Field Programmable Gate Array GPS Global Positioning System GUI Graphical...

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File:Arminius Instant-DevKit ARRIA 10 FPGA FMC IDK + 4DSP FMC142 (20047864595).jpg
Sabtu, 2025-07-12 22:48:27

DescriptionArminius Instant-DevKit ARRIA 10 FPGA FMC IDK + 4DSP FMC142 (20047864595).jpg <a href="https://www.reflexces.com/products/development-kits/...

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File:Canadian Hydrogen Intensity Mapping Experiment - X-engine.jpg
Senin, 2025-11-10 02:54:34

Reference Repeating Fast Radio Bursts Ring Canada’s CHIME - FPGAs, GPUs, and CPUs Sift Through the Universe’s Electromagnetic Spectrum to Make the Discovery...

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File:Design considerations for a computationally-lightweight authentication mechanism for passive RFID tags (IA designconsiderat109454511).pdf
Kamis, 2026-01-29 10:28:03

Radio-Frequency CRC: Cyclic Redundancy Check IC: Integrated-Circuit FPGA: Field Programmable Gate Array CMOS: Complementary Metal-Oxide Semiconductor...

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File:Appunti di Calcolatori elettronici.pdf
Minggu, 2023-09-10 09:43:39

visualizzazione a trattini sul display del supermercato. FPGA Il Field Programmable Gate Array (FPGA) aggiunge alla PLA una componente sequenziale e la possibilità...

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File:Reducing electromagnetic interference in a grid tied single phase power inverter (IA reducingelectrom1094550499).pdf
Selasa, 2026-06-02 13:08:31

under test EMS energy management system FFT fast Fourier transform FPGA field programmable gate array IGBT insulated-gate bipolar transistor ...

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File:35c3-9612-eng-deu-The nextpnr FOSS FPGA place-and-route tool webm-hd.webm
Minggu, 2023-05-28 00:20:08

Description35c3-9612-eng-deu-The nextpnr FOSS FPGA place-and-route tool webm-hd.webm 9612-The nextpnr FOSS FPGA place-and-route tool Date 27 December 2018...

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File:Canadian Hydrogen Intensity Mapping Experiment - F-engine.jpg
Selasa, 2024-08-06 10:34:59

Reference Repeating Fast Radio Bursts Ring Canada’s CHIME - FPGAs, GPUs, and CPUs Sift Through the Universe’s Electromagnetic Spectrum to Make the Discovery...

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File:Hybrid hard and soft decision decoding of Reed-Solomon codes for M-ARY frequency-shift keying (IA hybridhardndsoft109455342).pdf
Sabtu, 2024-08-17 23:46:00

Detection and Correction FEC Forward Error Correction FH Frequency Hopped FPGA Field Programmable Gate Arrays ITU International Telecommunications Union...

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File:Joint demodulation of low-entropy narrow band cochannel signals (IA jointdemodulatio109452478).pdf
Minggu, 2024-08-18 15:54:53

field error rate FFT fast Fourier transform FIR finite impulse response FPGA Field Programmable Gate Array FSK frequency shift keying GMSK Gaussian...

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File:OJ L 186 of 2023 - DA Danish.pdf
Rabu, 2025-07-09 15:55:09

KN-kode Integrerede kredsløb som følger: Feltprogrammerbart gate array (FPGA), mikrocontroller, mikroprocessor, signalprocessor, signalanalysator ex...

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File:Photonic analog-to-digital converters preprocessing using the robust symmetrical number system for direct digitization of antenna signals (IA photonicnalogtod109454970).pdf
Selasa, 2022-02-22 01:24:27

..................................52 Comparison of ADC input signal and FPGA output signal.............................54 Figure 24. Figure 25. Figure...

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File:Canadian Hydrogen Intensity Mapping Experiment - wire-mesh half pipe reflector.jpg
Senin, 2025-11-10 02:54:36

Reference Repeating Fast Radio Bursts Ring Canada’s CHIME - FPGAs, GPUs, and CPUs Sift Through the Universe’s Electromagnetic Spectrum to Make the Discovery...

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File:Canadian Hydrogen Intensity Mapping Experiment - overall.jpg
Selasa, 2024-01-30 17:23:27

Reference Repeating Fast Radio Bursts Ring Canada’s CHIME - FPGAs, GPUs, and CPUs Sift Through the Universe’s Electromagnetic Spectrum to Make the Discovery...

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File:Appendix A- Engineering - civil design and geotech analysis - USACE-p16021coll7-2099.pdf
Sabtu, 2025-07-12 19:28:05

seismic zones. Determine Minimum Design Connection Force AS = Fpga PGA Site Factor, Fpga = Eq 3.10.4.2-2 1.6 Table 3.10.3.2-1 Accerlation Coeff, As =...

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File:Authorship attribution of short messages using multimodal features (IA authorshipttribu109455813).pdf
Minggu, 2024-08-18 21:49:33

Telecommunications Standards Institute FDM Frequency Division Multiplexing FPGA Field-Programmable Gate Array GMSK Gaussian Minimum-Shift Keying GMT...

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File:X-BAND SOFTWARE-DEFINED RADIO FOR CUBESAT APPLICATIONS (IA xbandsoftwaredef1094563431).pdf
Minggu, 2024-08-18 18:06:27

forward error correction FIFO first in first out FM frequency modulation FPGA field programmable gate array FSK frequency shift keying FSPL free space...

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File:Electromagnetic technology division- programs, activities, and accomplishments (IA electromagnetict6626elec).pdf
Rabu, 2021-12-15 17:25:59

by a 14-bit analog-to-digital converter. Fieldprogrammable gate arrays (FPGAs) of the digitizers then digitally filter at the output the signal with...

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File:NPSAT1 Missile System Prelaunch Safety Package (MSPSP) (IA npsatmissilesyst109451529).pdf
Senin, 2020-11-09 00:57:42

the interface to the spacecraft modem. A field programmable gate array (FPGA) implements the PC/104 bus and the EDAC controller. The EDAC is one-bit correctable...

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File:Sinclair ZX81 PCB Top.JPG
Sabtu, 2026-04-25 17:05:47

2102 1313 410 757 3648 2736 ROM 1108 442 388 1104 3648 2736 „ULA2C184E“ FPGA (Uncommitted Logic Array) English object of statement has role: photographer...

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File:OJ C 210 of 2021 - FI Finnish.pdf
Selasa, 2025-07-01 00:09:20

maailmanlaajuinen puolijohdeyritys. Xilinx tuottaa ohjelmoitavia porttimatriiseja (FPGA). Kyseessä on siru, jonka asiakkaat voivat valmistuksen jälkeen ohjelmoida...

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File:Planarity in ROMDD's of multiple-valued symmetric functions (IA planarityinromdd1094532192).pdf
Senin, 2024-08-19 00:48:05

. . . Binary Decision Diagram CW . . . . . . . . . . Cumulative Weight FPGA . . . . . . . . Field Programmable Gate Array :MDD . . . . . . . . . Multiple-valued...

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File:FPGA's in Prototype (386486231).jpg
Jumat, 2026-05-01 21:55:34

DescriptionFPGA's in Prototype (386486231).jpg FPGA's in Prototype Date 11 February 2007, 18:21 Source FPGA's in Prototype Author Alex Dawson from Perth...

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File:VHDL.pdf
Jumat, 2025-06-20 12:48:06

mySig; end architecture; Für detailierte Information zum Thema Reset im FPGAs siehe das Whitepaper von Xilinx "Get Smart About Reset: Think Local, Not...

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File:FREE SPACE OPTICS IMPLEMENTATION OF THE NETWORK STACK WITHIN AN RF-DENIED ENVIRONMENT (IA freespaceopticsi1094562723).pdf
Sabtu, 2024-08-17 00:42:14

Checking ECC Error Correction Capabilities FCS Frame Check Sequence FPGA Field Programmable Gate Arrays FPS Frames Per Second FSK Frequency-...

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File:FORWARD ERROR CORRECTION ENCODING ON THE MULTIPLE INPUT-MULTIPLE OUTPUT FREE SPACE OPTICAL COMMUNICATIONS CHANNEL (IA forwarderrorcorr1094562846).pdf
Rabu, 2021-02-03 19:42:14

information DoD Department of Defense FEC forward error correction FPGA field programmable gate array FSO free space optical LDPC low-density...

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File:OJ L 334 of 2017 - EL Greek.pdf
Selasa, 2025-06-24 09:41:34

Engine Control) FFT Ταχύς μετασχηματισμός Fourier (Fast Fourier Transform) FPGA Προγραμματιζόμενη διάταξη θυρών πεδίου (Field Programmable Gate Array) ...

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File:FPGA's in production BeBox (386487655).jpg
Minggu, 2026-04-19 11:30:59

DescriptionFPGA's in production BeBox (386487655).jpg FPGA's in production BeBox Date 11 February 2007, 18:40 Source FPGA's in production BeBox Author...

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File:OJ L 202302616 of 2023 - BG Bulgarian.pdf
Rabu, 2025-09-24 21:01:42

пълно цифрово управление на двигателя FFT Бързо преобразуване на Фурие FPGA/КЛЕЗП Комбинационен логически елемент със зони за програмиране FPIC/ПМВВ...

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File:Modeling single-event transients in complex digital systems (IA modelingsingleev109459776).pdf
Minggu, 2024-08-18 21:54:50

Specific Integrated Circuit (ASIC) ...87 2. Field Programmable Gate Array (FPGA)..............................................88 3. Off-the-Shelf Processor...

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File:OJ C 210 of 2021 - BG Bulgarian.pdf
Selasa, 2025-11-25 13:47:19

развива дейност в областта на доставката на програмируеми логически матрици („FPGA“) — микрочипове, които потребителите могат да програмират след тяхното производство...

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File:OJ L 138 of 2023 - EL Greek.pdf
Sabtu, 2026-03-07 04:21:56

Engine Control) FFT Ταχύς μετασχηματισμός Fourier (Fast Fourier Transform) FPGA Συστοιχία επιτόπια προγραμματιζόμενων πυλών (Field Programmable Gate Array)...

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File:OJ L 202402547 of 2024 - EL Greek.pdf
Jumat, 2025-10-17 12:29:46

Engine Control) FFT Ταχύς μετασχηματισμός Fourier (Fast Fourier Transform) FPGA Συστοιχία επιτόπια προγραμματιζόμενων πυλών (Field Programmable Gate Array)...

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File:PHOTONIC ANALOG-TO-INFORMATION RECEIVER SIGNAL PROCESSING (IA photonicanalogto1094562229).pdf
Minggu, 2024-08-18 01:26:32

transform EW electronic warfare FCC Federal Communications Commission FPGA field-programmable gate array MZI Mach-Zehnder interferometer NYFR Nyquist...

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File:OJ C 310 of 2015 - EL Greek.pdf
Selasa, 2026-01-13 11:43:40

προϊόντων που περιλαμβάνει συστοιχίες πεδιακά προγραμματιζόμενων πυλών («FPGA») και πολύ­ πλοκες προγραμματιζόμενες λογικές διατάξεις («CPLD»). 3. Κατόπιν...

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File:OJ L 421 of 2020 - EL Greek.pdf
Senin, 2025-06-30 00:17:29

Engine Control) FFT Ταχύς μετασχηματισμός Fourier (Fast Fourier Transform) FPGA Προγραμματιζόμενη διάταξη θυρών πεδίου (Field Programmable Gate Array) ...

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File:OJ C 210 of 2021 - ET Estonian.pdf
Selasa, 2025-07-01 00:09:15

pooljuhtide tootja. Ta tarnib kasutaja poolt programmeeritavaid lüüsimaatrikseid (FPGA) – kiipe, mida kliendid saavad pärast tootmist programmeerida vajalike loogikafunktsioonide...

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File:OJ L 319 of 2018 - EL Greek.pdf
Kamis, 2025-06-26 04:26:41

Engine Control) FFT Ταχύς μετασχηματισμός Fourier (Fast Fourier Transform) FPGA Προγραμματιζόμενη διάταξη θυρών πεδίου (Field Programmable Gate Array) ...

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File:MicroprocessorDesign.pdf
Rabu, 2024-08-14 18:42:37

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 42 FPGA 43 Photolithography 43.1 Wafers . . . . . . . . . 43.2 Basic Photolithography...

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File:OJ L 9 of 2023 - EL Greek.pdf
Sabtu, 2025-07-05 02:35:26

Engine Control) FFT Ταχύς μετασχηματισμός Fourier (Fast Fourier Transform) FPGA Συστοιχία επιτόπια προγραμματιζόμενων πυλών (Field Programmable Gate Array)...

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File:Methods for Trustworthy Design of On-Chip Bus Interconnect for General-Purpose Processors (IA methodsfortrustw109456790).pdf
Jumat, 2026-01-09 21:30:03

Service DPU Data-based Protection Unit FHM Flaw Hypothesis Methodology FPGA Field Programmable Gate Array Gb/s Gigabyte/second GB Gigabyte GLIFT...

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File:OJ C 210 of 2021 - CS Czech.pdf
Minggu, 2025-08-17 18:02:11

polovodiči. Působí v oblasti dodávek programovatelných hradlových polí (FPGA), což jsou čipy, které mohou zákazníci po výrobě naprogramovat tak, aby vykonávaly...

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File:OJ L 319 of 2018 - BG Bulgarian.pdf
Kamis, 2025-06-26 04:24:43

пълно цифрово управление на двигателя FFT Бързо преобразуване на Фурие FPGA/КЛЕЗП Комбинационен логически елемент със зони за програмиране FPIC/ПМВВ...

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File:OJ L 138 of 2023 - BG Bulgarian.pdf
Sabtu, 2025-07-05 21:54:20

пълно цифрово управление на двигателя FFT Бързо преобразуване на Фурие FPGA/КЛЕЗП Комбинационен логически елемент със зони за програмиране FPIC/ПМВВ...

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File:S41586-020-2649-2.pdf
Kamis, 2025-07-10 22:29:43

(GPUs), tensor processing units (TPUs) and field-programmable gate arrays (FPGAs). Owing to its in-memory data model, NumPy is currently unable to directly...

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File:OJ L 338 of 2019 - ET Estonian.pdf
Minggu, 2025-08-03 01:41:17

mootori juhtimine) FFT Fast Fourier Transform (Fourier’ kiirteisendus) FPGA Field Programmable Gate Array (väljaga programmeeritav ventiilmaatriks)...

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File:OJ L 202402897 of 2024 - EL Greek.pdf
Sabtu, 2025-10-18 01:44:55

Ολοκληρωμένα κυκλώματα, ως εξής: προγραμματιζόμενες διατάξεις θυρών πεδίου (FPGA), ex 8542 31 μικροσυσκευές ελέγχου, μικροεπεξεργαστές, επεξεργαστές σήματος...

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File:Software defined radio design for synchronization of 802.11A receiver (IA softwaredefinedr109453197).pdf
Jumat, 2020-08-28 08:08:59

BLANK xii LIST OF SYMBOLS, ACRONYMS AND ABBREVIATIONS ADC AWGN CP DSW FFT FPGA ICI IF IFFT ISI JPEO JTRS LP MAC MMI OFDM OSSIE OWD PHY PLCP PPDU PSDU PSK...

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File:OJ L 202402897 of 2024 - BG Bulgarian.pdf
Sabtu, 2025-10-18 01:44:36

ХС/КН Интегрални схеми, както следва: програмируеми от потребителя матрици (FPGA), ex 8542 31 микроконтролери, микропроцесори, сигнални процесори, сигнални...

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File:OJ L 202402547 of 2024 - BG Bulgarian.pdf
Jumat, 2025-10-17 12:28:55

пълно цифрово управление на двигателя FFT Бързо преобразуване на Фурие FPGA/КЛЕЗП Комбинационен логически елемент със зони за програмиране FPIC/ПМВВ...

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File:OJ L 338 of 2019 - BG Bulgarian.pdf
Sabtu, 2025-06-28 02:38:19

пълно цифрово управление на двигателя FFT Бързо преобразуване на Фурие FPGA/КЛЕЗП Комбинационен логически елемент със зони за програмиране FPIC/ПМВВ...

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File:OJ L 202402547 of 2024 - FI Finnish.pdf
Jumat, 2025-10-17 12:30:21

ohjausjärjestelmät) FFT Fast Fourier Transform (nopea Fourier-muunnos) FPGA Field Programmable Gate Array (ohjelmoitava porttimatriisi) FPIC Field...

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File:OJ C 210 of 2021 - PL Polish.pdf
Selasa, 2025-07-01 01:10:56

zakresie dostarczania na rynek bezpośrednio programowalnych macierzy bramek („FPGA”), układów scalonych, które klienci mogą zaprogramować po wyprodukowaniu...

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File:CONSIDERATIONS FOR OPERATIONALIZING CAPABILITIES FOR EMBEDDED COMMUNICATIONS SIGNALS IN MARITIME RADAR (IA considerationsfo1094561390).pdf
Sabtu, 2024-08-17 02:22:48

research into a hardware model for a receiver that could be implemented in an FPGA that would be similar to those found in any number of navigation radars....

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File:OJ C 210 of 2021 - SL Slovenian.pdf
Selasa, 2025-07-01 00:10:51

kotira na borzi. Dejaven je na področju dobave programirljivih mrež vrat („FPGA“), čipa, ki ga stranke lahko programirajo po izdelavi za izvajanje poljubnih...

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File:Synchronization analysis and simulation of a standard IEEE 802.11g OFDM signal (IA synchronizationn109451652).pdf
Sabtu, 2022-11-05 12:18:37

possible incorporation of these designs into a Field Programmable Gate Array (FPGA) design for practical implementation of a real system. Chapter IV introduces...

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File:OJ C 210 of 2021 - HU Hungarian.pdf
Selasa, 2025-07-01 00:09:41

félvezetőgyártó vállalat. A felhasználás helyén programozható logikai kapumátrixokat (FPGA-kat) gyárt, amely olyan mikrocsip, amelyet az ügyfelek a kívánt logikai funkciók...

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File:OJ L 138 of 2023 - ET Estonian.pdf
Sabtu, 2025-07-05 21:55:32

mootori juhtimine) FFT Fast Fourier Transform (Fourier’ kiirteisendus) FPGA Field Programmable Gate Array (väljaga programmeeritav ventiilmaatriks)...

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File:OJ L 421 of 2020 - FI Finnish.pdf
Senin, 2025-06-30 00:16:58

ohjausjärjestelmät) FFT Fast Fourier Transform (nopea Fourier-muunnos) FPGA Field Programmable Gate Array (ohjelmoitava porttimatriisi) FPIC Field...

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File:OJ L 421 of 2020 - ET Estonian.pdf
Senin, 2025-06-30 00:16:47

mootori juhtimine) FFT Fast Fourier Transform (Fourier’ kiirteisendus) FPGA Field Programmable Gate Array (väljaga programmeeritav ventiilmaatriks)...

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File:OJ L 319 of 2018 - FI Finnish.pdf
Kamis, 2025-06-26 04:26:05

ohjausjärjestelmät) FFT Fast Fourier Transform (nopea Fourier-muunnos) FPGA Field Programmable Gate Array (ohjelmoitava porttimatriisi) FPIC Field...

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File:Design and prototyping of a satellite antenna slew testbed (IA designndprototyp1094538908).pdf
Sabtu, 2025-12-27 21:45:06

elevation EPOS2 easy to use POSitioning 2 FDM fused deposition modeling FPGA field-programmable gate array GSP gooseneck support plate IPM interpolated...

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File:OJ C 210 of 2021 - HR Croatian.pdf
Selasa, 2025-07-01 00:08:49

globalnoj razini. Bavi se isporukom programirljivih logičkih sklopova („FPGA”), čipa koji kupci mogu sami programirati za izvršavanje željenih logičkih...

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File:BaANH50786 Colección Cabodi.pdf
Selasa, 2025-08-19 13:01:22

embarcación mayante ,. se dejará restituí»y castigar ai, qus hubies.e.promovido ¡g,fpga^ y al que. Iq^ubiese recibid®, y escondí^ do. Lo mismo, y con lqBnjjyma se...

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File:GSM Network Employment on a Man-Portable UAS (IA gsmnetworkemploy1094517449).pdf
Sabtu, 2026-03-07 03:06:49

Fast Fourier Transform FL Flight Level FOSS Free Open Source Software FPGA Field Programmable Gate Array FPV First Person View FY Fiscal Year ...

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File:Radio implementation of a testbed for cognitive radio source localization using USRPS and GNU radio (IA radioimplementat1094543932).pdf
Selasa, 2024-08-27 04:40:43

FDMA Frequency-Division Multiple Access FFT Fast Fourier Transformation FPGA Field Programmable Gate Array IEEE Institute of Electrical and Electronics...

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File:Lithium gadolinium borate in plastic scintillator as an antineutrino detection material (IA lithiumgadoliniu109455261).pdf
Minggu, 2024-08-18 12:21:42

ABBREVIATIONS ADC Analog-to-Digital Converters DAQ Data Acquisition FIFO FPGA FWHM Fan-In/Fan-Out Field Programmable Gate Array Full Width Half-Max IAEA...

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File:OJ L 421 of 2020 - BG Bulgarian.pdf
Kamis, 2026-03-12 20:41:24

пълно цифрово управление на двигателя FFT Бързо преобразуване на Фурие FPGA/КЛЕЗП Комбинационен логически елемент със зони за програмиране FPIC/ПМВВ...

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File:OJ L 202302616 of 2023 - EL Greek.pdf
Rabu, 2025-10-01 06:33:29

Engine Control) FFT Ταχύς μετασχηματισμός Fourier (Fast Fourier Transform) FPGA Συστοιχία επιτόπια προγραμματιζόμενων πυλών (Field Programmable Gate Array)...

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File:OJ L 3 of 2022 - BG Bulgarian.pdf
Senin, 2025-11-17 23:04:32

пълно цифрово управление на двигателя FFT Бързо преобразуване на Фурие FPGA/КЛЕЗП Комбинационен логически елемент със зони за програмиране FPIC/ПМВВ...

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File:OJ L 3 of 2022 - ET Estonian.pdf
Rabu, 2026-04-29 01:38:57

mootori juhtimine) FFT Fast Fourier Transform (Fourier’ kiirteisendus) FPGA Field Programmable Gate Array (väljaga programmeeritav ventiilmaatriks)...

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File:OJ L 334 of 2017 - ET Estonian.pdf
Selasa, 2025-06-24 09:40:49

mootori juhtimine) FFT Fast Fourier Transform (Fourier' kiirteisendus) FPGA Field Programmable Gate Array (väljaga programmeeritav ventiilmaatriks)...

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File:OJ L 3 of 2022 - HU Hungarian.pdf
Rabu, 2025-07-02 17:15:09

rend­ szerek FFT Fast Fourier Transform gyors Fourier-transzformáció FPGA Field Programmable Gate Array felhasználó által programozható kapu tömb...

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File:Flexible multi-body spacecraft simulator- design, construction, and experiments (IA flexiblemultibod1094556795).pdf
Jumat, 2024-08-16 23:58:39

input/output real-time controller DC direct current DOF degree of freedom FPGA field-programmable gate array KKT Karush-Kuhn-Tucker LQR linear quadratic...

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File:Utilizing an energy management system with distributed resources to manage critical loads and reduce energy costs (IA utilizingnenergy1094543921).pdf
Minggu, 2024-08-18 12:42:13

management system ESS energy storage system EPS Electric Power System FPGA Field Programmed Gate Array IG Inspector General JCTD Joint Capabilities...

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File:Removal of direct current link harmonic ripple in single-phase voltage source inverter systems using supercapacitors (IA removalofdirectc1094550559).pdf
Jumat, 2026-05-08 15:02:09

Department of the Navy DR distributed resources EMS energy management system FPGA field-programmable gate array HESS hybrid energy storage system IGBT...

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File:PhysRevLett.115.250401.pdf
Kamis, 2026-04-09 02:42:34

switchable polarization rotator in front of a plate PBS. Customized electronics (FPGA) sampled the output of a random number generator (RNG) to trigger the switching...

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File:OJ L 186 of 2023 - HU Hungarian.pdf
Rabu, 2025-07-09 15:41:01

alábbiak szerint: A felhasználás helyén programozható logikai kapumátrix (FPGA), mikrovezérlő, mikroprocesszor, digitális jelfeldolgozó, jelanalizátor....

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File:OJ L 202402547 of 2024 - HU Hungarian.pdf
Minggu, 2026-01-04 12:54:29

hajtóművezérlési rendszerek FFT Fast Fourier Transform gyors Fourier-transzformáció FPGA Field Programmable Gate Array felhasználó által programozható kapu tömb...

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File:OJ L 3 of 2022 - FI Finnish.pdf
Minggu, 2026-03-08 14:22:56

ohjausjärjestelmät) FFT Fast Fourier Transform (nopea Fourier-muunnos) FPGA Field Programmable Gate Array (ohjelmoitava porttimatriisi) FPIC Field...

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File:OJ L 202402547 of 2024 - ET Estonian.pdf
Rabu, 2025-10-22 01:24:32

mootori juhtimine) FFT Fast Fourier Transform (Fourier’ kiirteisendus) FPGA Field Programmable Gate Array (väljaga programmeeritav ventiilmaatriks)...

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File:OJ L 202402659 of 2024 - LV Latvian.pdf
Kamis, 2025-10-16 05:30:25

modernām vai konkrētam pielietojumam paredzētām integrālshēmām (piem., FPGA, ASIC utt.), kas palielina sekundē apstrādājamu pakešu vai komunikācijas...

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File:OJ L 421 of 2020 - LV Latvian.pdf
Sabtu, 2025-09-06 21:04:17

pilnīgi vadāma dzinēju kontroles sistēma FFT ātrais Furjē pārveidojums FPGA lauka programmējamā ventiļu matrica FPIC uz vietas programmējamais savstarpējais...

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File:OJ L 334 of 2017 - DE German.pdf
Selasa, 2025-06-24 09:41:22

Control) FFT Schnelle Fouriertransformation (Fast Fourier Transform) FPGA Field Programmable Gate Array FPIC Field Programmable Interconnect FPLA...

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File:OJ L 202402897 of 2024 - FI Finnish.pdf
Sabtu, 2025-10-18 01:45:10

HS-/CN-koodi Seuraavat integroidut piirit: Ohjelmoitava porttimatriisi (FPGA), mikro-ohjaimet, ex 8542 31 mikroprosessorit, signaaliprosessorit, signaalianalysaattorit...

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File:OJ L 202302616 of 2023 - ET Estonian.pdf
Rabu, 2025-09-24 21:02:44

mootori juhtimine) FFT Fast Fourier Transform (Fourier’ kiirteisendus) FPGA Field Programmable Gate Array (väljaga programmeeritav ventiilmaatriks)...

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File:Ommelander courant 14-09-1810 (IA ddd 010216422 mpeg21).pdf
Sabtu, 2025-09-20 22:13:23

van :. -de 93 905 ingezetenen 03,329 Fr zyrr, blykers eene naauwkeurige fpga-e, van 95 Roomfche kerken in dar bisdom 49, de en van 75 pastoors. 66 geplunderd...

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File:Basic linear algebra operations in SLI arithmetic (IA basiclinearalgeb5811anut).pdf
Selasa, 2024-11-12 18:09:16

error detection and correction, and physical design of processing units (FPGA to full custom implementation, optimal latch insertion, wave pipelining,...

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File:OJ L 334 of 2017 - FI Finnish.pdf
Rabu, 2025-08-13 20:57:20

ohjausjärjestelmät) FFT Fast Fourier Transform (nopea Fourier-muunnos) FPGA Field Programmable Gate Array (ohjelmoitava porttimatriisi) FPIC Field...

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File:2004 conference on IEEE 1588, standard for a precision clock synchronization protocol for networked measurement and control systems (IA 2004conferenceon7192leek).pdf
Rabu, 2026-01-28 19:38:33

Transparen t Switch RJ45 jacks 2 RS232 interfaces CPLD EPM7064AE Altera FPGA ITAG Confrg interface CPLD JTAG interface 2 MByte Rash 8 X LSI Logic...

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File:Design and evaluation of a digital flight control system for the Frog Unmanned Aerial Vehicle (IA designndevaluati109451661).pdf
Kamis, 2026-04-23 12:12:57

MC68322FC micro-controller with a Xilinx 3030 field programmable gate array (FPGA) onto a standardized form factor to provide advanced data acquisition and...

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File:OJ L 3 of 2022 - LV Latvian.pdf
Rabu, 2025-07-02 16:15:00

pilnīgi vadāma dzinēju kontroles sistēma FFT ātrais Furjē pārveidojums FPGA lauka programmējamā ventiļu matrica FPIC uz vietas programmējamais savstarpējais...

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File:OJ L 421 of 2020 - DE German.pdf
Senin, 2025-06-30 00:17:17

Control) FFT Schnelle Fouriertransformation (Fast Fourier Transform) FPGA Field Programmable Gate Array FPIC Field Programmable Interconnect FPLA...

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File:OJ L 202302616 of 2023 - HU Hungarian.pdf
Rabu, 2025-09-24 21:03:31

hajtóművezérlési rendszerek FFT Fast Fourier Transform gyors Fourier-transzformáció FPGA Field Programmable Gate Array felhasználó által programozható kapu tömb...

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File:MCST-4R FPGA prototype.gif
Senin, 2012-07-16 03:17:11

This work is licensed under the Creative Commons Attribution-ShareAlike 2.5 License. https://creativecommons.org/licenses/by-sa/2.5/CC-BY-SA-2.5Creative...

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File:OJ L 138 of 2023 - LV Latvian.pdf
Sabtu, 2025-07-05 21:56:49

pilnīgi vadāma dzinēju kontroles sistēma FFT ātrais Furjē pārveidojums FPGA lauka programmējamā ventiļu matrica FPIC uz vietas programmējamais savstarpējais...

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File:Improving the performance of MEMS gyros via redundant measurements- theory and experiments (IA improvingperform1094544605).pdf
Jumat, 2026-05-29 09:10:33

reconfigurable input output DOF degrees of freedom EPS electrical power system FPGA field programmable gate array IMU inertial measurement unit LabVIEW ...

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File:OJ L 186 of 2023 - DE German.pdf
Rabu, 2025-07-09 15:55:39

und Systeme Warenbezeichnung KN-Code Integrierte Schaltungen wie folgt: FPGA (Field Programmable Gate Array, anwenderprogrammierbares Logikgatter), Mikrocontroller...

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File:OJ C 210 of 2021 - DE German.pdf
Kamis, 2026-03-19 07:57:50

anbietet; — Xilinx: börsennotiertes weltweit tätiges Halbleiterunternehmen, das FPGA (field programmable gate arrays) anbietet, d. h. Chips, die Kunden nach der...

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File:OJ L 319 of 2018 - LT Lithuanian.pdf
Kamis, 2025-06-26 04:27:28

skaitmeninis variklio režimų reguliatorius FFT Sparčioji Furjė transformacija FPGA Vartotojo programuojama loginių elementų matrica FPIC Vartotojo programuojama...

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File:OJ L 138 of 2023 - LT Lithuanian.pdf
Sabtu, 2025-07-05 21:56:59

skaitmeninis variklio režimų reguliatorius FFT Sparčioji Furjė transformacija FPGA Vartotojo programuojama loginių elementų matrica FPIC Vartotojo programuojama...

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File:OJ L 338 of 2019 - HU Hungarian.pdf
Jumat, 2025-11-14 05:52:38

hajtóművezérlési rendszerek FFT Fast Fourier Transform gyors Fourier-transzformáció FPGA Field Programmable Gate Array felhasználó által programozható kapu tömb...

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File:OJ C 394A of 2012 - ET Estonian.pdf
Selasa, 2025-05-06 00:51:19

skeemide kontrollimine / vigade kõrvaldamine, programmeeritav ventiilmaatriks (FPGA) ja täisprogrammee­ ritav loogikaseade (CPLD), mikroprotsessorid); 4. töökogemus...

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File:OJ L 338 of 2019 - FI Finnish.pdf
Senin, 2025-09-08 05:16:00

ohjausjärjestelmät) FFT Fast Fourier Transform (nopea Fourier-muunnos) FPGA Field Programmable Gate Array (ohjelmoitava porttimatriisi) FPIC Field...

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File:OJ L 334 of 2017 - LV Latvian.pdf
Selasa, 2025-06-24 09:42:10

pilnīgi vadāma dzinēju kontroles sistēma FFT ātrais Furjē pārveidojums FPGA lauka programmējamā ventiļu matrica FPIC uz vietas programmējamais savstarpējais...

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File:OJ L 421 of 2020 - PL Polish.pdf
Senin, 2025-06-30 00:18:58

system cyfrowego sterowania silnikami FFT szybka transformata Fouriera FPGA macierz bramek programowalna przez użytkownika FPIC połączenie wewnętrzne...

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File:OJ L 338 of 2019 - LT Lithuanian.pdf
Sabtu, 2025-06-28 02:41:21

skaitmeninis variklio režimų reguliatorius FFT Sparčioji Furjė transformacija FPGA Vartotojo programuojama loginių elementų matrica FPIC Vartotojo programuojama...

Click to read more »
File:OJ L 421 of 2020 - SK Slovak.pdf
Senin, 2025-06-30 00:19:27

oprávnením FFT rýchla Fourierova transformácia (Fast Fourier Transform) FPGA hradlové polia programovateľné u zákazníka FPIC prepojenia programovateľné...

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File:OJ L 202302616 of 2023 - LV Latvian.pdf
Rabu, 2025-09-24 21:03:48

pilnīgi vadāma dzinēju kontroles sistēma FFT ātrais Furjē pārveidojums FPGA lauka programmējamā ventiļu matrica FPIC uz vietas programmējamais savstarpējais...

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File:OJ L 319 of 2018 - LV Latvian.pdf
Kamis, 2025-06-26 04:27:16

pilnīgi vadāma dzinēju kontroles sistēma FFT ātrais Furjē pārveidojums FPGA lauka programmējamā ventiļu matrica FPIC uz vietas programmējamais savstarpējais...

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File:OJ L 202490067 of 2024 - DA Danish.pdf
Minggu, 2025-09-28 22:31:53

Engine Control FFT Fast Fourier Transform (Fast Fourier-transformation) FPGA gate arrays, der er programmerbare på stedet FPIC kontakter, der er programmerbare...

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File:OJ L 202402547 of 2024 - PL Polish.pdf
Jumat, 2025-10-17 12:32:28

system cyfrowego sterowania silnikami FFT szybka transformata Fouriera FPGA macierz bramek programowalna przez użytkownika FPIC połączenie wewnętrzne...

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File:OJ L 138 of 2023 - EN English.pdf
Selasa, 2025-09-16 10:39:30

FADEC Full Authority Digital Engine Control FFT Fast Fourier Transform FPGA Field Programmable Gate Array FPIC Field Programmable Interconnect FPLA...

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File:OJ L 9 of 2023 - HU Hungarian.pdf
Sabtu, 2025-07-05 02:35:38

rend­ szerek FFT Fast Fourier Transform gyors Fourier-transzformáció FPGA Field Programmable Gate Array felhasználó által programozható kapu tömb...

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File:OJ L 202402897 of 2024 - ET Estonian.pdf
Sabtu, 2025-10-18 01:45:05

HS-/CN-kood Järgmised integraallülitused: programmeeritav ventiilimaatriks (FPGA), mikrokontrollerid, ex 8542 31 mikroprotsessorid, signaaliprotsessorid,...

Click to read more »
File:OJ L 138 of 2023 - SK Slovak.pdf
Sabtu, 2025-07-05 21:58:25

oprávnením FFT rýchla Fourierova transformácia (Fast Fourier Transform) FPGA hradlové polia programovateľné u zákazníka FPIC prepojenia programovateľné...

Click to read more »
File:OJ L 9 of 2023 - LT Lithuanian.pdf
Sabtu, 2025-07-05 02:36:20

skaitmeninis variklio režimų reguliatorius FFT Sparčioji Furjė transformacija FPGA Vartotojo programuojama loginių elementų matrica FPIC Vartotojo programuojama...

Click to read more »
File:OJ L 138 of 2023 - PL Polish.pdf
Sabtu, 2025-07-05 21:57:55

system cyfrowego sterowania silnikami FFT szybka transformata Fouriera FPGA macierz bramek programowalna przez użytkownika FPIC połączenie wewnętrzne...

Click to read more »
File:OJ L 421 of 2020 - EN English.pdf
Selasa, 2026-05-12 13:37:54

FADEC Full Authority Digital Engine Control FFT Fast Fourier Transform FPGA Field Programmable Gate Array FPIC Field Programmable Interconnect FPLA...

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File:Development of a hardware-in-the-loop simulator for control moment gyroscope-based attitude control systems (IA developmentofhar1094547945).pdf
Sabtu, 2026-04-25 20:30:38

direction cosine matrix EPOS Easy Positioning System DC ECU FIFO FPGA direct current electronic control unit first in, first out field-programmable...

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File:OJ L 334 of 2017 - EN English.pdf
Selasa, 2025-06-24 09:40:38

FADEC Full Authority Digital Engine Control FFT Fast Fourier Transform FPGA Field Programmable Gate Array FPIC Field Programmable Interconnect FPLA...

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File:OJ L 138 of 2023 - HU Hungarian.pdf
Sabtu, 2025-07-05 21:56:21

rend­ szerek FFT Fast Fourier Transform gyors Fourier-transzformáció FPGA Field Programmable Gate Array felhasználó által programozható kapu tömb...

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File:OJ L 186 of 2023 - ET Estonian.pdf
Minggu, 2025-07-06 10:49:40

CN-kood Järgmised integraallülitused: programmeeritav ventiilimaatriks (FPGA), mikrokontroller, mikroprotsessor, signaaliprotsessor, signaalianalüsaator...

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File:OJ C 210 of 2021 - SV Swedish.pdf
Selasa, 2025-07-01 00:11:01

halvledarföretag. Xilinx är verksamt inom leverans av fältprogrammerbara grindmatriser (FPGA), ett chip som kunderna kan programmera efter tillverkning för att utföra...

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File:OJ L 202402897 of 2024 - EN English.pdf
Sabtu, 2025-10-18 01:44:59

HS/CN code Integrated circuits as follows: Field Programable Gate Array (FPGA), microcontrollers, ex 8542 31 microprocessors, signal processors, signal...

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File:OJ L 334 of 2017 - LT Lithuanian.pdf
Selasa, 2025-06-24 09:42:22

skaitmeninis variklio režimų reguliatorius FFT Sparčioji Furjė transformacija FPGA Vartotojo programuojama loginių elementų matrica FPIC Vartotojo programuojama...

Click to read more »
File:OJ L 338 of 2019 - CS Czech.pdf
Kamis, 2025-11-06 16:58:27

číslicové řízení motoru s plnou autoritou FFT rychlá Fourierova transformace FPGA uživatelem programovatelné hradlové pole FPIC uživatelem programovatelný...

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File:OJ L 202402547 of 2024 - CS Czech.pdf
Jumat, 2025-10-17 12:29:08

číslicové řízení motoru s plnou autoritou FFT rychlá Fourierova transformace FPGA uživatelem programovatelné hradlové pole FPIC uživatelem programovatelný...

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File:OJ L 202402547 of 2024 - LT Lithuanian.pdf
Jumat, 2025-10-17 12:31:51

skaitmeninis variklio režimų reguliatorius FFT Sparčioji Furjė transformacija FPGA Vartotojo programuojama loginių elementų matrica FPIC Vartotojo programuojama...

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File:OJ C 310 of 2015 - FI Finnish.pdf
Jumat, 2025-06-20 07:54:23

ohjelmoitavia logiikkapiirejä (PLD), joka on sekä ohjel­ moitavat porttimatriisit (FPGA) että monimutkaiset ohjelmoitavat logiikkapiirit (CPLD) sisältävä tuoteluokka...

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File:OJ L 202302616 of 2023 - DE German.pdf
Sabtu, 2025-11-22 13:22:34

Control) FFT Schnelle Fouriertransformation (Fast Fourier Transform) FPGA Field Programmable Gate Array FPIC Field Programmable Interconnect FPLA...

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File:Management of microcircuit obsolescence in a pre-production ACAT-ID missile program (IA managementofmicr109453460).pdf
Sabtu, 2024-08-24 20:13:55

Aviation Administration FFF Form-Fit-Function FMS Foreign Military Sales FPGA Field Programmable Gate Array GBI Ground Base Interceptor (formally NMD)...

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File:OJ C 210 of 2021 - RO Romanian.pdf
Kamis, 2025-11-20 03:15:12

activități de furnizare de rețele de porți programabile de utilizator („FPGA”), un cip pe care clienții îl pot programa, după fabricare, pentru a executa...

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File:OJ L 9 of 2023 - LV Latvian.pdf
Sabtu, 2025-07-05 02:36:11

pilnīgi vadāma dzinēju kontroles sistēma FFT ātrais Furjē pārveidojums FPGA lauka programmējamā ventiļu matrica FPIC uz vietas programmējamais savstarpējais...

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File:PhysRevD.101.012009.pdf
Selasa, 2026-03-03 04:54:25

The FADC DAQ has a separate trigger, implemented through the programmable FPGA unit. The FADC event time window (DAQ gate) is 1.28 μs long. The trigger...

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File:OJ L 186 of 2023 - EN English.pdf
Selasa, 2025-11-11 07:57:40

CN code Integrated circuits as follows: Field Programable Gate Array (FPGA), microcontroller, microprocessor, signal processor, signal analyser. ex...

Click to read more »
File:OJ L 319 of 2018 - SK Slovak.pdf
Kamis, 2025-06-26 04:28:30

oprávnením FFT rýchla Fourierova transformácia (Fast Fourier Transform) FPGA hradlové polia programovateľné u zákazníka FPIC prepojenia programovateľné...

Click to read more »
File:OJ L 138 of 2023 - SV Swedish.pdf
Sabtu, 2025-07-05 21:58:53

Digital Engine Control FFT Fast Fourier Transform (Snabb Fourier-transform) FPGA Field Programmable Gate Array (fältprogrammerbar grindmatris) FPIC Field...

Click to read more »
File:OJ L 202402897 of 2024 - DE German.pdf
Sabtu, 2025-10-18 01:44:50

Elektronik Warenbezeichnung HS/KN-Code Integrierte Schaltungen wie folgt: FPGA (Field Programmable Gate Array, ex 8542 31 anwenderprogrammierbares Logikgatter)...

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File:Design of a microelectronic controller with a MIL-STD-1553 bus interface for the tactile situation awareness system (IA designofmicroele00luke).pdf
Kamis, 2026-04-23 14:05:26

Erasable Programmable Read Only EVA Extra Vehicular Activity F Farads FPGA Field Programmable Gate Array GCA Ground Controlled Approach GPS Global...

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File:OJ L 9 of 2023 - EN English.pdf
Sabtu, 2025-07-05 02:34:40

FADEC Full Authority Digital Engine Control FFT Fast Fourier Transform FPGA Field Programmable Gate Array FPIC Field Programmable Interconnect FPLA...

Click to read more »
File:OJ L 202302616 of 2023 - LT Lithuanian.pdf
Rabu, 2025-09-24 21:04:00

skaitmeninis variklio režimų reguliatorius FFT Sparčioji Furjė transformacija FPGA Vartotojo programuojama loginių elementų matrica FPIC Vartotojo programuojama...

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File:OJ L 421 of 2020 - CS Czech.pdf
Senin, 2025-06-30 00:16:10

číslicové řízení motoru s plnou autoritou FFT rychlá Fourierova transformace FPGA uživatelem programovatelné hradlové pole FPIC uživatelem programovatelný...

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File:OJ L 202402659 of 2024 - CS Czech.pdf
Kamis, 2025-10-16 05:29:26

pokročilých nebo aplikačně specifických integrovaných obvodů (například FPGA, ASIC a další), aby se zvýšil počet paketů nebo komunikačních spojení, jež...

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File:PhysRevC.99.064313.pdf
Jumat, 2025-06-20 07:41:54

potentials along the ion path are performed via an FieldProgrammable Gate Array (FPGA) - based trigger system [44]. Recently, major improvements have been made...

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File:OJ L 334 of 2017 - RO Romanian.pdf
Selasa, 2025-06-24 09:43:08

Engine Control) FFT Transformata Fourier rapidă (Fast Fourier Transform) FPGA Rețele de porți programabile de utilizator (Field Programmable Gate Array)...

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File:OJ L 421 of 2020 - NL Dutch.pdf
Senin, 2025-06-30 00:16:28

zelfstandig in de motorregeling kan ingrijpen FFT Snelle Fourier-transformatie FPGA Door de gebruiker te programmeren ‹gate array› FPIC Door de gebruiker...

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File:OJ L 3 of 2022 - CS Czech.pdf
Rabu, 2025-07-02 17:13:10

číslicové řízení motoru s plnou autoritou FFT rychlá Fourierova transformace FPGA uživatelem programovatelné hradlové pole FPIC uživatelem programovatelný...

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File:OJ L 202402897 of 2024 - SL Slovenian.pdf
Senin, 2026-01-26 16:00:32

Elektronika Opis Oznaka HS/KN Integrirana vezja: programirljivo logično vezje (FPGA), mikrokrmilniki, mikroprocesorji, ex 8542 31 signalni procesorji, signalni...

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File:OJ L 3 of 2022 - SV Swedish.pdf
Jumat, 2025-12-05 13:30:15

Digital Engine Control FFT Fast Fourier Transform (Snabb Fourier-transform) FPGA Field Programmable Gate Array (fältprogrammerbar grindmatris) FPIC Field...

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File:The Event Horizon Telescope Collaboration 2019 ApJL 875 L2.pdf
Rabu, 2026-03-04 16:20:45

2008; Issaoun et al. 2019). and flexible field programmable gate array (FPGA) computational fabric have enabled the EHT to reach data throughputs of 64...

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File:OJ L 202302616 of 2023 - EN English.pdf
Minggu, 2025-09-28 03:55:48

FADEC Full Authority Digital Engine Control FFT Fast Fourier Transform FPGA Field Programmable Gate Array FPIC Field Programmable Interconnect FPLA...

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File:OJ L 202402897 of 2024 - NL Dutch.pdf
Jumat, 2026-01-23 14:21:03

gebruiker te programmeren gate array (Field ex 8542 31 Programable Gate Array — FPGA), microcontrollers, microprocessoren, signaalprocessoren, signaalanalysatoren...

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File:OJ L 186 of 2023 - GA Irish.pdf
Rabu, 2025-07-09 15:40:07

iomlánaithe, mar a leanas:follows: Eagar Geataí In-Ríomhchláraithe sa Réimse (FPGA), micririaltán, micreaphróiseálaí, próiseálaí comharthaí, anailíseoir comharthaí...

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File:OJ L 338 of 2019 - RO Romanian.pdf
Sabtu, 2025-06-28 02:42:25

al motorului FFT (Fast Fourier Transform) Transformata Fourier rapidă FPGA (Field Programmable Gate Array) Rețele de porți programabile de utilizator...

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File:OJ L 3 of 2022 - SK Slovak.pdf
Rabu, 2025-07-02 16:15:59

oprávnením FFT rýchla Fourierova transformácia (Fast Fourier Transform) FPGA hradlové polia programovateľné u zákazníka FPIC prepojenia programovateľné...

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File:OJ L 9 of 2023 - CS Czech.pdf
Sabtu, 2025-07-05 02:34:12

číslicové řízení motoru s plnou autoritou FFT rychlá Fourierova transformace FPGA uživatelem programovatelné hradlové pole FPIC uživatelem programovatelný...

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File:Miniaturization of a microcontroller for the tactile situational awareness system. (IA miniaturizationo00wood).pdf
Minggu, 2024-08-18 20:46:36

Vehicular Activity F Farads FCC Flight Control FDD Floppy Disk Drive FPGA Field FPU Floating Point Unit G Gravity GCA Ground Collision Avoidance...

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File:OJ L 338 of 2019 - LV Latvian.pdf
Sabtu, 2025-06-28 02:41:09

pilnīgi vadāma dzinēju kontroles sistēma FFT ātrais Furjē pārveidojums FPGA lauka programmējamā ventiļu matrica FPIC uz vietas programmējamais savstarpējais...

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File:OJ L 202302616 of 2023 - PL Polish.pdf
Rabu, 2025-09-24 21:04:28

system cyfrowego sterowania silnikami FFT szybka transformata Fouriera FPGA macierz bramek programowalna przez użytkownika FPIC połączenie wewnętrzne...

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File:Proton transport through nanoscale corrugations in two-dimensional crystals.pdf
Jumat, 2025-05-09 21:21:51

Newport). Data acquisition and instrumental control were carried out using an FPGA card (PCIe-7852R) running the Warwick Electrochemical Scanning Probe Microscopy...

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File:OJ L 421 of 2020 - RO Romanian.pdf
Senin, 2025-06-30 00:19:18

moto­ rului FFT (Fast Fourier Transform) Transformata Fourier rapidă FPGA (Field Programmable Gate Array) Rețele de porți programabile de utilizator...

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File:OJ L 186 of 2023 - PL Polish.pdf
Rabu, 2025-07-09 15:43:52

Następujące układy scalone: Bezpośrednio programowalna macierz bramek (FPGA), mikrokontroler, mikroprocesor, procesor sygnałów, analizator sygnałów....

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File:OJ L 202402897 of 2024 - SV Swedish.pdf
Sabtu, 2025-10-18 01:46:27

Integrerade kretsar enligt följande: Fältprogrammerbara grindmatriser (FPGA), styrprocessorer, ex 8542 31 mikroprocessorer, signalprocessorer, signalanalysatorer...

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File:OJ L 334 of 2017 - DA Danish.pdf
Selasa, 2025-06-24 09:40:16

Engine Control FFT Fast Fourier Transform (Fast Fourier-transformation) FPGA gate arrays, der er programmerbare på stedet FPIC kontakter, der er programmerbare...

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File:Use of symmetrical number systems in electronic warfare (IA useofsymmetrical1094539024).pdf
Senin, 2025-01-13 13:53:22

parameters via rotational invariance techniques EW Electronic warfare FPGA Field programmable logic device FIR Finite impulse response FFT Fast...

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File:OJ L 138 of 2023 - MT Maltese.pdf
Sabtu, 2025-07-05 21:57:43

Diġitali tal-Mutur b’Awtorità Sħiħa FFT Trasformata Rapida ta’ Fourier FPGA Arranġament ta’ Bibien Programmabbli mill-Utent FPIC Interkonnessjoni...

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File:OJ C 310 of 2015 - PL Polish.pdf
Jumat, 2025-06-20 07:55:08

która obejmuje zarówno tablice bramek programo­ walne przez użytkownika (FPGA), jak i złożone programowalne urządzenia logiczne (CPLD). 3. Po wstępnej...

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File:Quality of service schemes for mobile ad-hoc networks (IA qualityofservice1094510827).pdf
Selasa, 2025-12-09 04:16:28

processing (DSP) chips, microprocessor chips, field-programmable arrays (FPGA), and other programmable devices [1]. By using the SDR technology, tactical...

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File:OJ L 202302616 of 2023 - NL Dutch.pdf
Rabu, 2025-09-24 21:04:18

zelfstandig in de motorregeling kan ingrijpen FFT Snelle Fourier-transformatie FPGA Door de gebruiker te programmeren ‹gate array› FPIC Door de gebruiker...

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File:OJ L 202402547 of 2024 - RO Romanian.pdf
Jumat, 2025-10-17 12:32:54

al motorului FFT (Fast Fourier Transform) Transformata Fourier rapidă FPGA (Field Programmable Gate Array) Rețele de porți programabile de utilizator...

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File:OJ L 421 of 2020 - SV Swedish.pdf
Senin, 2025-06-30 00:19:57

Digital Engine Control FFT Fast Fourier Transform (Snabb Fourier-transform) FPGA Field Programmable Gate Array (fältprogrammerbar grindmatris) FPIC Field...

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File:OJ L 338 of 2019 - SV Swedish.pdf
Sabtu, 2025-06-28 02:43:17

Digital Engine Control FFT Fast Fourier Transform (Snabb Fourier-transform) FPGA Field Programmable Gate Array (fältprogrammerbar grindmatris) FPIC Field...

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File:OJ L 334 of 2017 - SV Swedish.pdf
Selasa, 2025-06-24 09:43:53

Digital Engine Control FFT Fast Fourier Transform (Snabb Fourier-transform) FPGA Field Programmable Gate Array (fältprogrammerbar grindmatris) FPIC Field...

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File:OJ L 202302616 of 2023 - GA Irish Gaelic.pdf
Rabu, 2025-09-24 21:03:12

Rialú Digiteach Innill le hÚdarás Iomlán FFT Trasfhoirm Tapa Fourier FPGA Eagar Geataí In-ríomhchláraithe sa Réimse FPIC Idirnasc In-ríomhchláraithe...

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File:Doctrine Of The Deluge- In Two Vols (IA dli.granth.37842).pdf
Minggu, 2026-05-03 16:29:46

Evpordznc. — Batrach. 300. 3 Nvieripou TeXeri; cowallopo; acrrlip. Ibid. 'AXX' fpga, x'ihron alp% Tip) Vyretpco, — i 7* XCipaY Cr461V pie k Tac rgpac. Ibid....

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File:WikiCon 2012 Programmheft 150dpi.pdf
Rabu, 2025-01-08 15:32:22

Wissenschaftlicher Mitarbeiter an der BFH, Entwicklung eines open source Hardware FPGA Boards für Schulung, Forschung und Industrieprojekte: Gecko3 • Hobbies: Fahradfahren...

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File:OJ C 210 of 2021 - FR French.pdf
Jumat, 2026-05-08 08:24:19

semi-conducteurs cotée en bourse. Xilinx fournit des réseaux de portes programmables («FPGA»), une puce que les clients peuvent programmer après fabrication aux fins...

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File:OJ L 202302616 of 2023 - SK Slovak.pdf
Rabu, 2025-09-24 21:04:56

oprávnením FFT rýchla Fourierova transformácia (Fast Fourier Transform) FPGA hradlové polia programovateľné u zákazníka FPIC prepojenia programovateľné...

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File:OJ C 310 of 2015 - HR Croatian.pdf
Jumat, 2025-06-20 07:53:49

koja obuhvaća i nizove upravljačkih elektroda s programabilnim poljem („FPGA”) i složene programabilne logičke uređaje („CPLD”). 3. Preliminarnim ispitivanjem...

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File:Nanodiamonds enable adaptive-optics enhanced, super-resolution, two-photon excitation microscopy.pdf
Sabtu, 2025-04-19 07:31:52

performed by custom-written Labview software driving a National Instruments FPGA. 3. Two-photon imaging We begin by demonstrating the effectiveness of two-photon...

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File:OJ L 138 of 2023 - ES Spanish.pdf
Sabtu, 2025-07-05 21:58:44

Control) FFT Transformada rápida de Fourier (Fast Fourier Transform) FPGA Matriz de puertas programable in situ (Field Programmable Gate Array) FPIC...

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File:OJ L 202402659 of 2024 - HR Croatian.pdf
Kamis, 2025-11-20 00:09:56

integriranim sklopovima ili integriranim sklopovima specifične namjene (primjerice FPGA, ASIC itd.) za povećanje broja paketa ili komunikacijskih sesija koji se...

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File:OJ L 202402547 of 2024 - NL Dutch.pdf
Jumat, 2025-10-17 12:32:16

zelfstandig in de motorregeling kan ingrijpen FFT Snelle Fourier-transformatie FPGA Door de gebruiker te programmeren ‹gate array› FPIC Door de gebruiker...

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File:Superregular grammars do not provide additional explanatory power but allow for a compact analysis of animal song.pdf
Minggu, 2025-04-20 02:58:44

eight-channel microphone array (TAMAGO-03, System in Frontier, Inc., with the FPGA customized such that 212 dBSPL of additional gain was applied), and we used...

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File:OJ L 202402897 of 2024 - SK Slovak.pdf
Senin, 2026-04-13 22:52:23

znak KN Integrované obvody: hradlové pole programovateľné u zákazníka (FPGA), mikroovládače, ex 8542 31 mikroprocesory, signálne procesory, analyzátory...

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File:OJ L 9 of 2023 - DA Danish.pdf
Selasa, 2025-12-02 19:37:04

Engine Control FFT Fast Fourier Transform (Fast Fourier-transformation) FPGA gate arrays, der er programmerbare på stedet FPIC kontakter, der er programmerbare...

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File:OJ L 202302616 of 2023 - DA Danish.pdf
Rabu, 2025-09-24 21:01:59

Engine Control FFT Fast Fourier Transform (Fast Fourier-transformation) FPGA gate arrays, der er programmerbare på stedet FPIC kontakter, der er programmerbare...

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File:OJ L 9 of 2023 - SL Slovenian.pdf
Minggu, 2025-11-16 11:03:29

popolno digitalno krmiljenje motorja FFT hitra Fouriereva transformacija FPGA programirljiva mreža vrat FPIC programirljiva mreža medpovezav FPLA ...

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File:OJ L 186 of 2023 - CS Czech.pdf
Sabtu, 2026-05-23 05:36:57

Popis Kód KN Integrované obvody: uživatelem programovatelné hradlové pole (FPGA); mikroregulátor, mikroprocesor, procesor signálu, analyzátor signálů ex...

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File:OJ L 186 of 2023 - SV Swedish.pdf
Rabu, 2025-07-09 15:46:12

Integrerade kretsar enligt följande: fältprogrammerbara grindmatriser (FPGA), styrprocessor, mikroprocessor, signalprocessor, signalanalysator. ex 8542...

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File:The uncertainty of the half-life.pdf
Selasa, 2022-06-07 18:16:13

analysers (ADC), but they can also be replaced by programmable processors (FPGA) or software performing off-line data analysis of digitally acquired data...

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File:OJ L 319 of 2018 - ET Estonian.pdf
Kamis, 2025-06-26 04:25:53

mootori juhtimine) FFT Fast Fourier Transform (Fourier' kiirteisendus) FPGA Field Programmable Gate Array (väljaga programmeeritav ventiilmaatriks)...

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File:Performance analysis and enhancements for the music sub-space direction-finding algorithm in the presence of wideband signals (IA performancenalys1094544676).pdf
Minggu, 2024-08-18 16:11:55

techniques FDOA frequency difference-of-arrival FFT fast Fourier transform FPGA field programmable gate array IF intermediate frequency LFM linear frequency...

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File:OJ L 338 of 2019 - DA Danish.pdf
Sabtu, 2025-06-28 02:38:57

Engine Control FFT Fast Fourier Transform (Fast Fourier-transformation) FPGA gate arrays, der er programmerbare på stedet FPIC kontakter, der er programmerbare...

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File:OJ L 9 of 2023 - NL Dutch.pdf
Sabtu, 2025-07-05 02:34:31

in de motor­ regeling kan ingrijpen FFT Snelle Fourier-transformatie FPGA Door de gebruiker te programmeren ‹gate array› FPIC Door de gebruiker...

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File:OJ L 202302616 of 2023 - SL Slovenian.pdf
Rabu, 2025-09-24 21:05:05

popolno digitalno krmiljenje motorja FFT hitra Fourierova transformacija FPGA programirljiva matrika logičnih vrat FPIC programirljiva mreža medpovezav...

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File:OJ C 310 of 2015 - CS Czech.pdf
Jumat, 2025-06-20 07:53:57

tj. kategorie produktů, do níž patří jak programovatelná hradlová pole (FPGA), tak komplexní programova­ telné logické obvody (CPLD). 3. Komise po předběžném...

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File:OJ L 9 of 2023 - HR Croatian.pdf
Sabtu, 2025-07-05 02:34:02

FADEC Potpuno digitalno upravljanje motorom FFT Brzi Fourierov transform FPGA Programirljivi logički sklopovi FPIC Programirljivi sklop međuveza FPLA...

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File:OJ L 202402897 of 2024 - CS Czech.pdf
Sabtu, 2025-10-18 01:44:40

Kód HS/KN Integrované obvody: Uživatelem programovatelné hradlové pole (FPGA); mikroregulátory, ex 8542 31 mikroprocesory, procesory signálu, analyzátory...

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File:OJ L 338 of 2019 - SL Slovenian.pdf
Sabtu, 2025-06-28 02:42:52

popolno digitalno krmiljenje motorja FFT hitra Fouriereva transformacija FPGA programirljiva mreža vrat FPIC programirljiva mreža medpovezav FPLA ...

Click to read more »
File:OJ L 202302616 of 2023 - RO Romanian.pdf
Rabu, 2025-09-24 21:04:45

al motorului FFT (Fast Fourier Transform) Transformata Fourier rapidă FPGA (Field Programmable Gate Array) Rețele de porți programabile de utilizator...

Click to read more »
File:OJ L 138 of 2023 - DA Danish.pdf
Sabtu, 2025-07-05 21:55:03

Engine Control FFT Fast Fourier Transform (Fast Fourier-transformation) FPGA gate arrays, der er programmerbare på stedet FPIC kontakter, der er programmerbare...

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File:OJ L 202402897 of 2024 - LV Latvian.pdf
Minggu, 2026-03-15 00:28:05

kods Šādas integrālshēmas: darbības vidē programmējamu elementu kopnes (FPGA), ex 8542 31 mikrokontrolleri, mikroprocesori, signālu procesori, signālu...

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File:Design, implementation, and testing of a high performance summation adder for radar image synthesis (IA designimplementa109451883).pdf
Selasa, 2025-10-14 04:31:10

to other implementations. For example, a field programmable gate array (FPGA), vice ASIC implementation. In the stated task, the clock frequency is noted...

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File:OJ L 3 of 2022 - GA Irish.pdf
Rabu, 2025-07-02 16:14:41

Rialú Digiteach Innill le hÚdarás Iomlán FFT Trasfhoirm Tapa Fourier FPGA Eagar Geataí In-ríomhchláraithe sa Réimse FPIC Idirnasc In-ríomhchláraithe...

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File:OJ L 138 of 2023 - SL Slovenian.pdf
Sabtu, 2025-07-05 22:59:04

popolno digitalno krmiljenje motorja FFT hitra Fouriereva transformacija FPGA programirljiva mreža vrat FPIC programirljiva mreža medpovezav FPLA ...

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File:OJ L 186 of 2023 - RO Romanian.pdf
Rabu, 2025-07-09 15:44:47

Rețele de porți programabile de utilizator (Field Programmable Gate Array – FPGA), microcontroler, microprocesor, procesor de semnal, analizor de semnal....

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File:OJ L 202402547 of 2024 - GA Irish Gaelic.pdf
Kamis, 2025-11-13 20:13:29

Rialú Digiteach Innill le hÚdarás Iomlán FFT Trasfhoirm Tapa Fourier FPGA Eagar Geataí In-ríomhchláraithe sa Réimse FPIC Idirnasc In-ríomhchláraithe...

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File:OJ L 138 of 2023 - RO Romanian.pdf
Sabtu, 2025-07-05 21:58:15

al motorului FFT (Fast Fourier Transform) Transformata Fourier rapidă FPGA (Field Programmable Gate Array) Rețele de porți programabile de utilizator...

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