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The Common Management Interface Specification (CMIS) is a specification that defines a standard management interface and management protocol between a host system, such as a network switch or router, and the pluggable or on-board modules connected to it, such as optical modules and high-speed copper cable assemblies.^[1] CMIS is used by module form factors including QSFP-DD, OSFP, COBO and QSFP, and is designed to be form-factor independent so that it can also be implemented by future module types.^[1][2]

Originally developed by the QSFP-DD multi-source agreement (MSA) group, the specification was transferred to the Optical Internetworking Forum (OIF) in 2022, which has maintained and extended it since.^[2][3] Through CMIS, a host can identify a module, configure its operating mode, control its state, monitor temperature, optical power and error rates, run diagnostics such as loopbacks and bit-error-rate tests, and update the module's firmware in the field.^[1]

Management interfaces for earlier generations of pluggable transceivers, such as SFP and QSFP modules, were defined in SFF Committee documents and were closely tied to particular form factors. As module speeds increased and modules gained substantial internal processing — including DSP-based retimers, forward error correction and coherent optics — the QSFP-DD MSA group developed CMIS as a richer, form-factor-independent management specification. The first public release, revision 3.0, was published by the QSFP-DD MSA on August 17, 2018.^[1]

Revision 4.0 (May 2019) added several major features, including the Command Data Block (CDB) messaging mechanism, the Versatile Diagnostics Monitoring (VDM) feature, and dedicated diagnostics pages.^[1] Revision 5.0 (May 2021) consolidated the specification and added, among other features, firmware readback and timing specifications previously defined in the QSFP-DD hardware specification.^[1]

In January 2022 the OIF announced that development of CMIS would transfer from the QSFP-DD MSA to the OIF's Physical and Link Layer Working Group, with the stated aim of broadening industry participation in the specification's development.^[2][3][4] Revision 5.2 (April 2022) was the first revision published by the OIF.^[1] Revision 5.3 (September 2024) extended CMIS to co-packaged optics applications, adding support for external laser source (ELSFP) modules, an SPI-based management interface option, and module authentication commands.^[1] Revisions since 5.0 are specified as backward compatible with their predecessors, whereas revision 4.0 had explicitly broken compatibility with 3.0.^[1]

CMIS defines a layered management architecture in which management registers are accessed through a Management Communication Interface (MCI). The original and most common MCI is based on I²C (referred to in the specification as I2CMCI), operating at clock speeds up to 400 kHz, 1 MHz or 3.4 MHz depending on module capability; revision 5.3 added an SPI-based alternative (SPIMCI) supporting 1–50 MHz operation, primarily for co-packaged optics applications.^[1] The choice of a two-wire interface maintained continuity with earlier SFF-defined transceiver management interfaces while requiring few connector pins.^[1] Alongside the register interface, a small set of hardware signals (such as reset and interrupt) forms a management signaling layer, whose form-factor-specific pin names are mapped to generic CMIS signal names.^[1]

CMIS management registers are organized in a three-dimensional Bank:Page:Byte address space presented through a 256-byte addressing window inherited from earlier SFF management interfaces. The lower half of the window (bytes 0–127, "Lower Memory") is always present and holds the most frequently accessed identification, control and flag registers. The upper half (bytes 128–255, "Upper Memory") is a window into 128-byte pages, selected by a page-select register in Lower Memory; some pages are additionally banked, with a bank-select register choosing among multiple instances of the same page, each instance covering a group of up to eight lanes.^[1] Defined pages cover administrative information and advertising, alarm thresholds, lane and data path configuration and status, tunable laser control, performance diagnostics, timing, VDM and CDB messaging, with page ranges reserved for coherent-module management (C-CMIS) and for vendor-specific use.^[1]

CMIS describes a module's high-speed connectivity in terms of a host interface — the electrical interface between module and host, whose differential signal pairs are called host lanes — and a media interface toward the transmission medium, whose signals (electrical conductors in a copper cable assembly, or optical wavelengths and fibers) are called media lanes.^[1] A data path is a group of host lanes and associated media lanes, together with the module-internal resources connecting them, and each data path carries an application: a transmission configuration typically identified by a pairing of a host-side interface standard with a media-side interface standard (for example, a given Ethernet electrical interface paired with a given optical PMD).^[1] Modules advertise their supported applications, and the host selects among them when configuring the module. Applications in revision 5.3 are limited to at most eight host lanes and eight media lanes, with banked registers extending lane coverage for cable assemblies with more lanes.^[1]

Host–module interaction is organized around published state machines. The Module State Machine represents the module's overall readiness, with steady states including Reset, MgmtInit, ModuleLowPwr, ModuleReady and a ModuleFault state; all modules initially boot into low-power mode, in which the module can be safely identified and configured before it is allowed to draw full operating power.^[1] Each data path additionally has a Data Path State Machine, with states such as DPDeactivated, DPInit and DPActivated, governing initialization and activation of the high-speed lanes. Configuration changes are written into staged control sets and applied with explicit trigger registers, allowing coordinated reconfiguration.^[1]

CMIS defines an optional field-upgradeable firmware mechanism built on its Command Data Block (CDB) messaging feature. A module may store up to two host-updateable firmware images in storage banks called A and B, in addition to a protected factory image; at any time exactly one bank is committed, meaning it is the image the module will run after a reset or power cycle.^[1] Dedicated CDB commands cover the full update sequence — among them Start Firmware Download, Write Firmware Block, Complete Firmware Download, Run Firmware Image and Commit Firmware Image — enabling a host to download a new image into the inactive bank, trial-run it, and only then commit it, retaining the previous known-good image for fallback.^[1] The specification treats firmware content as opaque, so the same mechanism serves modules whose internal firmware is organized in vendor-specific ways (for example, separate bootloader and application or DSP firmware components).^[1]

For fault isolation and link bring-up, CMIS defines four loopback types: host side input, host side output, media side input and media side output loopbacks, which may be supported per-lane or for all lanes together.^[1] The specification also defines built-in test pattern generation and checking, including pseudorandom binary sequence (PRBS) generators and checkers that can be placed on either the host or media side, before or after the module's FEC, along with per-lane bit error rate measurement registers.^[1] The Versatile Diagnostics Monitoring feature provides threshold-crossing flags and statistics for observables such as error rates, signal-to-noise ratio and laser parameters.^[1]

CMIS modules report internally measured temperature, supply voltage, and per-lane optical power and laser bias monitors, each with associated high/low alarm and warning thresholds and latched flags; loss of signal (LOS) and clock-and-data-recovery loss of lock (LOL) conditions are reported as per-lane latched flags on both the host and media sides.^[1] Modules also advertise a power class (1 through 8) and their maximum power consumption in 0.25 W increments, which hosts use for thermal and power management of module cages; the power limits associated with each class are defined by the relevant hardware (form factor) specifications rather than by CMIS itself.^[1]

CMIS is complemented by a family of OIF supplements, including C-CMIS for coherent DWDM modules such as 400ZR, CMIS-LT for link training, and CMIS-ELSFP for external laser small form factor pluggable (ELSFP) modules — laser sources used in co-packaged optics architectures that are managed through the CMIS module state machine but do not themselves carry data.^[1] Module interface identification codes used by CMIS are maintained in SFF-8024.^[1] The OIF has presented CMIS as a common management layer intended to reduce integration effort across module vendors, form factors and host platforms.^[5]

• Optical module
• Small Form-factor Pluggable
• Optical Internetworking Forum
• I2C
• Co-packaged optics

• OIF CMIS project page
• OIF-CMIS-05.3 specification (PDF)

Category:Networking standards Category:Fiber-optic communications Category:Optical Internetworking Forum